889 lines
32 KiB
Rust
889 lines
32 KiB
Rust
//! Functionality for [`frida`](https://frida.re)-based binary-only `CmpLog`.
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//! With it, a fuzzer can collect feedback about each compare that happened in the target
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//! This allows the fuzzer to potentially solve the compares, if a compare value is directly
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//! related to the input.
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//! Read the [`RedQueen`](https://www.ndss-symposium.org/ndss-paper/redqueen-fuzzing-with-input-to-state-correspondence/) paper for the general concepts.
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#[cfg(all(feature = "cmplog", target_arch = "x86_64"))]
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use std::collections::HashMap;
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use dynasmrt::dynasm;
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#[cfg(target_arch = "aarch64")]
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use dynasmrt::{DynasmApi, DynasmLabelApi};
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use libafl::{
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inputs::{HasTargetBytes, Input},
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Error,
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};
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use libafl_targets::{self, CMPLOG_MAP_W};
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use rangemap::RangeMap;
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use crate::helper::FridaRuntime;
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extern "C" {
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/// Tracks cmplog instructions
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pub fn __libafl_targets_cmplog_instructions(k: u64, shape: u8, arg1: u64, arg2: u64);
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}
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#[cfg(target_arch = "aarch64")]
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use core::ffi::c_void;
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use std::rc::Rc;
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use frida_gum::ModuleMap;
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#[cfg(target_arch = "x86_64")]
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use frida_gum::{instruction_writer::InstructionWriter, stalker::StalkerOutput};
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#[cfg(target_arch = "aarch64")]
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use frida_gum::{
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instruction_writer::{Aarch64Register, IndexMode, InstructionWriter},
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stalker::StalkerOutput,
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};
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use frida_gum_sys::Insn;
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#[cfg(all(feature = "cmplog", target_arch = "x86_64"))]
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use iced_x86::{
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BlockEncoder, Code, DecoderOptions, Instruction, InstructionBlock, MemoryOperand, MemorySize,
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OpKind, Register,
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};
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#[cfg(all(feature = "cmplog", target_arch = "aarch64"))]
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use crate::utils::{disas_count, writer_register};
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#[cfg(all(feature = "cmplog", target_arch = "aarch64"))]
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/// Speciial `CmpLog` Cases for `aarch64`
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#[derive(Debug)]
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pub enum SpecialCmpLogCase {
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/// Test bit and branch if zero
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Tbz,
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/// Test bit and branch if not zero
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Tbnz,
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}
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#[cfg(all(feature = "cmplog", target_arch = "x86_64"))]
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/// Speciial `CmpLog` Cases for `aarch64`
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#[derive(Debug)]
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pub enum SpecialCmpLogCase {}
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#[cfg(target_arch = "aarch64")]
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use yaxpeax_arm::armv8::a64::{InstDecoder, Opcode, Operand, ShiftStyle};
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#[cfg(target_arch = "x86_64")]
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use yaxpeax_x86::long_mode::InstDecoder;
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/// The [`frida_gum_sys::GUM_RED_ZONE_SIZE`] casted to [`i32`]
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///
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/// # Panic
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/// In debug mode, will panic on wraparound (which should never happen in practice)
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#[cfg(all(feature = "cmplog", target_arch = "aarch64"))]
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#[allow(clippy::cast_possible_wrap)]
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fn gum_red_zone_size_i32() -> i32 {
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debug_assert!(
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i32::try_from(frida_gum_sys::GUM_RED_ZONE_SIZE).is_ok(),
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"GUM_RED_ZONE_SIZE is bigger than i32::max"
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);
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frida_gum_sys::GUM_RED_ZONE_SIZE as i32
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}
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/// The type of an operand loggged during `CmpLog`
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#[derive(Debug, Clone, Copy)]
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#[cfg(all(feature = "cmplog", target_arch = "aarch64"))]
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pub enum CmplogOperandType {
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/// A Register
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Regid(Aarch64Register),
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/// An immediate value
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Imm(u64),
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/// A constant immediate value
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Cimm(u64),
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// We don't need a memory type because you cannot directly compare with memory
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}
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/// The type of an operand loggged during `CmpLog`
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#[derive(Debug, Clone, Copy)]
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#[cfg(all(feature = "cmplog", target_arch = "x86_64"))]
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pub enum CmplogOperandType {
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/// A Register
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Reg(Register),
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/// An immediate value
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Imm(u64),
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/// A memory operand
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Mem(Register, Register, i64, u32, MemorySize), // base, index, disp, scale, mem_size
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}
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/// `Frida`-based binary-only innstrumentation that logs compares to the fuzzer
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/// `LibAFL` can use this knowledge for powerful mutations.
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#[derive(Debug)]
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#[cfg(target_arch = "aarch64")]
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pub struct CmpLogRuntime {
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ops_save_register_and_blr_to_populate: Option<Box<[u8]>>,
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ops_handle_tbz_masking: Option<Box<[u8]>>,
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ops_handle_tbnz_masking: Option<Box<[u8]>>,
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}
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/// `Frida`-based binary-only innstrumentation that logs compares to the fuzzer
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/// `LibAFL` can use this knowledge for powerful mutations.
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#[derive(Debug)]
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#[cfg(target_arch = "x86_64")]
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pub struct CmpLogRuntime {
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save_registers: Option<Box<[u8]>>,
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restore_registers: Option<Box<[u8]>>,
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}
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impl FridaRuntime for CmpLogRuntime {
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/// Initialize this `CmpLog` runtime.
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/// This will generate the instrumentation blobs for the current arch.
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fn init(
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&mut self,
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_gum: &frida_gum::Gum,
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_ranges: &RangeMap<usize, (u16, String)>,
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_module_map: &Rc<ModuleMap>,
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) {
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self.generate_instrumentation_blobs();
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}
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fn pre_exec<I: Input + HasTargetBytes>(&mut self, _input: &I) -> Result<(), Error> {
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Ok(())
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}
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fn post_exec<I: Input + HasTargetBytes>(&mut self, _input: &I) -> Result<(), Error> {
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Ok(())
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}
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}
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impl CmpLogRuntime {
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/// Create a new [`CmpLogRuntime`]
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#[must_use]
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#[cfg(target_arch = "aarch64")]
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pub fn new() -> CmpLogRuntime {
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Self {
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ops_save_register_and_blr_to_populate: None,
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ops_handle_tbz_masking: None,
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ops_handle_tbnz_masking: None,
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}
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}
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/// Create a new [`CmpLogRuntime`]
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#[must_use]
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#[cfg(target_arch = "x86_64")]
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pub fn new() -> CmpLogRuntime {
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Self {
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save_registers: None,
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restore_registers: None,
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}
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}
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/// Call the external function that populates the `cmplog_map` with the relevant values
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#[allow(clippy::unused_self)]
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#[cfg(target_arch = "aarch64")]
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extern "C" fn populate_lists(&mut self, op1: u64, op2: u64, retaddr: u64) {
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// log::trace!(
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// "entered populate_lists with: {:#02x}, {:#02x}, {:#02x}",
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// op1, op2, retaddr
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// );
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let mut k = (retaddr >> 4) ^ (retaddr << 8);
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k &= (CMPLOG_MAP_W as u64) - 1;
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unsafe {
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__libafl_targets_cmplog_instructions(k, 8, op1, op2);
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}
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}
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#[allow(clippy::unused_self)]
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#[cfg(target_arch = "x86_64")]
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extern "C" fn populate_lists(size: u8, op1: u64, op2: u64, retaddr: u64) {
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// log::trace!(
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// "entered populate_lists with: {:#02x}, {:#02x}, {:#02x}",
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// op1, op2, retaddr
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// );
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let mut k = (retaddr >> 4) ^ (retaddr << 8);
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k &= (CMPLOG_MAP_W as u64) - 1;
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unsafe {
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__libafl_targets_cmplog_instructions(k, size, op1, op2);
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}
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}
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/// Generate the instrumentation blobs for the current arch.
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#[allow(clippy::similar_names)]
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#[cfg(target_arch = "aarch64")]
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fn generate_instrumentation_blobs(&mut self) {
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macro_rules! blr_to_populate {
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($ops:ident) => {dynasm!($ops
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; .arch aarch64
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; stp x2, x3, [sp, #-0x10]!
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; stp x4, x5, [sp, #-0x10]!
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; stp x6, x7, [sp, #-0x10]!
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; stp x8, x9, [sp, #-0x10]!
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; stp x10, x11, [sp, #-0x10]!
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; stp x12, x13, [sp, #-0x10]!
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; stp x14, x15, [sp, #-0x10]!
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; stp x16, x17, [sp, #-0x10]!
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; stp x18, x19, [sp, #-0x10]!
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; stp x20, x21, [sp, #-0x10]!
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; stp x22, x23, [sp, #-0x10]!
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; stp x24, x25, [sp, #-0x10]!
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; stp x26, x27, [sp, #-0x10]!
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; stp x28, x29, [sp, #-0x10]!
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; stp x30, xzr, [sp, #-0x10]!
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; .dword 0xd53b4218u32 as i32 // mrs x24, nzcv
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// jump to rust based population of the lists
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; mov x2, x0
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; adr x3, >done
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; ldr x4, >populate_lists
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; ldr x0, >self_addr
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; blr x4
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// restore the reg state before returning to the caller
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; .dword 0xd51b4218u32 as i32 // msr nzcv, x24
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; ldp x30, xzr, [sp], #0x10
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; ldp x28, x29, [sp], #0x10
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; ldp x26, x27, [sp], #0x10
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; ldp x24, x25, [sp], #0x10
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; ldp x22, x23, [sp], #0x10
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; ldp x20, x21, [sp], #0x10
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; ldp x18, x19, [sp], #0x10
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; ldp x16, x17, [sp], #0x10
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; ldp x14, x15, [sp], #0x10
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; ldp x12, x13, [sp], #0x10
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; ldp x10, x11, [sp], #0x10
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; ldp x8, x9, [sp], #0x10
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; ldp x6, x7, [sp], #0x10
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; ldp x4, x5, [sp], #0x10
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; ldp x2, x3, [sp], #0x10
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; b >done
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; self_addr:
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; .qword self as *mut _ as *mut c_void as i64
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; populate_lists:
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; .qword CmpLogRuntime::populate_lists as *mut c_void as i64
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; done:
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);};
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}
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// ldp/stp is more efficient than str/ldr so we use them instead.
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macro_rules! tbz_masking {
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($ops:ident) => {dynasm!($ops
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; .arch aarch64
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; stp x5, xzr, [sp, #-0x10]!
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; mov x5, #1
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; lsl x5, x5, x1
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; eor x5, x5, #255
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; orr x1, x0, x5
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; ldp x5, xzr, [sp], #0x10
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);};
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}
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macro_rules! tbnz_masking {
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($ops:ident) => {dynasm!($ops
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; .arch aarch64
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; stp x5, xzr, [sp, #-0x10]!
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; mov x5, #1
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; lsl x5, x5, x1
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; orr x1, x0, x5
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; ldp x5, xzr, [sp], #0x10
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);};
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}
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let mut ops_handle_tbz_masking =
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dynasmrt::VecAssembler::<dynasmrt::aarch64::Aarch64Relocation>::new(0);
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tbz_masking!(ops_handle_tbz_masking);
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let mut ops_handle_tbnz_masking =
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dynasmrt::VecAssembler::<dynasmrt::aarch64::Aarch64Relocation>::new(0);
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tbnz_masking!(ops_handle_tbnz_masking);
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let mut ops_save_register_and_blr_to_populate =
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dynasmrt::VecAssembler::<dynasmrt::aarch64::Aarch64Relocation>::new(0);
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blr_to_populate!(ops_save_register_and_blr_to_populate);
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self.ops_handle_tbz_masking = Some(
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ops_handle_tbz_masking
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.finalize()
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.unwrap()
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.into_boxed_slice(),
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);
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self.ops_handle_tbnz_masking = Some(
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ops_handle_tbnz_masking
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.finalize()
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.unwrap()
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.into_boxed_slice(),
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);
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self.ops_save_register_and_blr_to_populate = Some(
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ops_save_register_and_blr_to_populate
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.finalize()
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.unwrap()
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.into_boxed_slice(),
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);
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}
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#[allow(clippy::similar_names)]
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#[cfg(all(windows, target_arch = "x86_64"))]
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fn generate_instrumentation_blobs(&mut self) {
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macro_rules! save_registers {
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($ops:ident) => {dynasm!($ops
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; .arch x64
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; push rcx
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; push rdx
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; push r8
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; push r9
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; push r10
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; push r11
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; push rax
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);};
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}
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let mut save_registers = dynasmrt::VecAssembler::<dynasmrt::x64::X64Relocation>::new(0);
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save_registers!(save_registers);
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self.save_registers = Some(save_registers.finalize().unwrap().into_boxed_slice());
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macro_rules! restore_registers {
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($ops:ident) => {dynasm!($ops
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; .arch x64
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; pop rax
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; pop r11
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; pop r10
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; pop r9
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; pop r8
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; pop rdx
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; pop rcx
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);};
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}
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let mut restore_registers = dynasmrt::VecAssembler::<dynasmrt::x64::X64Relocation>::new(0);
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restore_registers!(restore_registers);
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self.restore_registers = Some(restore_registers.finalize().unwrap().into_boxed_slice());
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}
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#[allow(clippy::similar_names)]
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#[cfg(all(unix, target_arch = "x86_64"))]
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fn generate_instrumentation_blobs(&mut self) {
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macro_rules! save_registers {
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($ops:ident) => {dynasm!($ops
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; .arch x64
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; push rax
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; push rdi
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; push rsi
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; push rdx
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; push rcx
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; push r8
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; push r9
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);};
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}
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let mut save_registers = dynasmrt::VecAssembler::<dynasmrt::x64::X64Relocation>::new(0);
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save_registers!(save_registers);
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self.save_registers = Some(save_registers.finalize().unwrap().into_boxed_slice());
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macro_rules! restore_registers {
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($ops:ident) => {dynasm!($ops
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; .arch x64
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; pop r9
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; pop r8
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; pop rcx
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; pop rdx
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; pop rsi
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; pop rdi
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; pop rax
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);};
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}
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let mut restore_registers = dynasmrt::VecAssembler::<dynasmrt::x64::X64Relocation>::new(0);
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restore_registers!(restore_registers);
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self.restore_registers = Some(restore_registers.finalize().unwrap().into_boxed_slice());
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}
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/// Get the blob which saves the context, jumps to the populate function and restores the context
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#[inline]
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#[must_use]
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#[cfg(target_arch = "aarch64")]
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pub fn ops_save_register_and_blr_to_populate(&self) -> &[u8] {
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self.ops_save_register_and_blr_to_populate.as_ref().unwrap()
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}
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/// Get the blob which handles the tbz opcode masking
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#[inline]
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#[must_use]
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#[cfg(target_arch = "aarch64")]
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pub fn ops_handle_tbz_masking(&self) -> &[u8] {
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self.ops_handle_tbz_masking.as_ref().unwrap()
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}
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/// Get the blob which handles the tbnz opcode masking
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#[inline]
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#[must_use]
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#[cfg(target_arch = "aarch64")]
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pub fn ops_handle_tbnz_masking(&self) -> &[u8] {
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self.ops_handle_tbnz_masking.as_ref().unwrap()
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}
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/// Emit the instrumentation code which is responsible for operands value extraction and cmplog map population
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#[cfg(all(feature = "cmplog", target_arch = "x86_64"))]
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#[allow(clippy::too_many_lines)]
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#[inline]
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pub fn emit_comparison_handling(
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&self,
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address: u64,
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output: &StalkerOutput,
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op1: &CmplogOperandType, //first operand of the comparsion
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op2: &CmplogOperandType, //second operand of the comparsion
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_shift: &Option<SpecialCmpLogCase>,
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_special_case: &Option<SpecialCmpLogCase>,
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) {
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let writer = output.writer();
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writer.put_bytes(&self.save_registers.clone().unwrap());
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// let int3 = [0xcc];
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// writer.put_bytes(&int3);
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let mut insts = vec![];
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// self ptr is not used so far
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let mut size_op = 0;
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let arg_reg_1;
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let arg_reg_2;
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let arg_reg_3;
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let arg_reg_4;
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let mut tmp_reg = HashMap::new();
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tmp_reg.insert(8, Register::RAX);
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tmp_reg.insert(4, Register::EAX);
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tmp_reg.insert(2, Register::AX);
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#[cfg(windows)]
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{
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arg_reg_1 = Register::CL;
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arg_reg_2 = Register::RDX;
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arg_reg_3 = Register::R8;
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arg_reg_4 = Register::R9;
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}
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#[cfg(unix)]
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{
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arg_reg_1 = Register::DL;
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arg_reg_2 = Register::RSI;
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arg_reg_3 = Register::RDX;
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arg_reg_4 = Register::RCX;
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}
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let mut set_size = |s: usize| {
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if size_op == 0 {
|
|
size_op = s;
|
|
} else {
|
|
assert_eq!(size_op, s);
|
|
}
|
|
};
|
|
// we put the operand value into rax and than push it on stack, so the
|
|
// only clobbered register is rax, and if actual operand value uses it,
|
|
// we simply restore it from stack
|
|
for (op_num, op) in [op1, op2].iter().enumerate() {
|
|
let op_num: i64 = op_num.try_into().unwrap();
|
|
match op {
|
|
CmplogOperandType::Reg(reg) => {
|
|
let info = reg.info();
|
|
set_size(info.size());
|
|
let reg_largest = reg.full_register();
|
|
if reg_largest == Register::RAX {
|
|
insts.push(
|
|
// we rely on the fact that latest saved register on stack is rax
|
|
Instruction::with1(
|
|
Code::Push_rm64,
|
|
MemoryOperand::with_base_displ(Register::RSP, op_num * 8),
|
|
)
|
|
.unwrap(),
|
|
);
|
|
} else {
|
|
insts.push(Instruction::with1(Code::Push_rm64, reg_largest).unwrap());
|
|
}
|
|
}
|
|
CmplogOperandType::Mem(reg_base, reg_index, disp, scale, mem_size) => {
|
|
let size;
|
|
let inst;
|
|
match *mem_size {
|
|
MemorySize::UInt64 | MemorySize::Int64 => {
|
|
size = 8;
|
|
inst = Code::Mov_r64_rm64;
|
|
}
|
|
MemorySize::UInt32 | MemorySize::Int32 => {
|
|
size = 4;
|
|
inst = Code::Mov_r32_rm32;
|
|
}
|
|
MemorySize::UInt16 | MemorySize::Int16 => {
|
|
size = 2;
|
|
inst = Code::Mov_r16_rm16;
|
|
}
|
|
_ => {
|
|
println!("Invalid memory size");
|
|
size = 4;
|
|
inst = Code::Push_rm32;
|
|
}
|
|
}
|
|
set_size(size);
|
|
let mut disp_adjusted = *disp;
|
|
let mut reg_base = *reg_base;
|
|
if reg_base == Register::RSP {
|
|
// 0x38 is an amount of bytes used by save_registers()
|
|
disp_adjusted = disp_adjusted + 0x38 + 8_i64 * op_num;
|
|
}
|
|
let tmp_reg_adjusted = *tmp_reg.get(&size).unwrap();
|
|
// in case of RIP, disp is an absolute address already calculated
|
|
// by iced, we can simply load it to rax (but in this case index register must
|
|
// be not rax)
|
|
if reg_base == Register::RIP {
|
|
insts.push(
|
|
Instruction::with2(Code::Mov_r64_imm64, Register::RAX, disp_adjusted)
|
|
.unwrap(),
|
|
);
|
|
reg_base = Register::RAX;
|
|
disp_adjusted = 0;
|
|
}
|
|
insts.push(
|
|
Instruction::with2(
|
|
inst,
|
|
tmp_reg_adjusted,
|
|
MemoryOperand::with_base_index_scale_displ_size(
|
|
reg_base,
|
|
*reg_index,
|
|
*scale,
|
|
disp_adjusted,
|
|
1,
|
|
),
|
|
)
|
|
.unwrap(),
|
|
);
|
|
insts.push(Instruction::with1(Code::Push_rm64, Register::RAX).unwrap());
|
|
}
|
|
CmplogOperandType::Imm(imm) => {
|
|
insts.push(Instruction::with1(Code::Pushq_imm32, *imm as i32).unwrap());
|
|
}
|
|
}
|
|
}
|
|
|
|
insts.push(Instruction::with2(Code::Mov_r8_imm8, arg_reg_1, size_op as u64).unwrap());
|
|
insts.push(Instruction::with1(Code::Pop_r64, arg_reg_2).unwrap());
|
|
insts.push(Instruction::with1(Code::Pop_r64, arg_reg_3).unwrap());
|
|
insts.push(Instruction::with2(Code::Mov_r64_imm64, arg_reg_4, address).unwrap());
|
|
let block = InstructionBlock::new(&insts, 0);
|
|
let block = BlockEncoder::encode(64, block, DecoderOptions::NONE).unwrap();
|
|
writer.put_bytes(block.code_buffer.as_slice());
|
|
writer.put_call_address((CmpLogRuntime::populate_lists as usize).try_into().unwrap());
|
|
|
|
writer.put_bytes(&self.restore_registers.clone().unwrap());
|
|
}
|
|
|
|
/// Emit the instrumentation code which is responsible for operands value extraction and cmplog map population
|
|
#[cfg(all(feature = "cmplog", target_arch = "aarch64"))]
|
|
#[allow(clippy::too_many_lines)]
|
|
#[inline]
|
|
pub fn emit_comparison_handling(
|
|
&self,
|
|
_address: u64,
|
|
output: &StalkerOutput,
|
|
op1: &CmplogOperandType, //first operand of the comparsion
|
|
op2: &CmplogOperandType, //second operand of the comparsion
|
|
_shift: &Option<(ShiftStyle, u8)>,
|
|
special_case: &Option<SpecialCmpLogCase>,
|
|
) {
|
|
let writer = output.writer();
|
|
|
|
// Preserve x0, x1:
|
|
writer.put_stp_reg_reg_reg_offset(
|
|
Aarch64Register::X0,
|
|
Aarch64Register::X1,
|
|
Aarch64Register::Sp,
|
|
i64::from(-(16 + gum_red_zone_size_i32())),
|
|
IndexMode::PreAdjust,
|
|
);
|
|
|
|
// make sure operand1 value is saved into x0
|
|
match op1 {
|
|
CmplogOperandType::Imm(value) | CmplogOperandType::Cimm(value) => {
|
|
writer.put_ldr_reg_u64(Aarch64Register::X0, *value);
|
|
}
|
|
CmplogOperandType::Regid(reg) => match *reg {
|
|
Aarch64Register::X0 | Aarch64Register::W0 => {}
|
|
Aarch64Register::X1 | Aarch64Register::W1 => {
|
|
writer.put_mov_reg_reg(Aarch64Register::X0, Aarch64Register::X1);
|
|
}
|
|
_ => {
|
|
if !writer.put_mov_reg_reg(Aarch64Register::X0, *reg) {
|
|
writer.put_mov_reg_reg(Aarch64Register::W0, *reg);
|
|
}
|
|
}
|
|
},
|
|
}
|
|
|
|
// make sure operand2 value is saved into x1
|
|
match op2 {
|
|
CmplogOperandType::Imm(value) | CmplogOperandType::Cimm(value) => {
|
|
writer.put_ldr_reg_u64(Aarch64Register::X1, *value);
|
|
if let Some(inst) = special_case {
|
|
match inst {
|
|
SpecialCmpLogCase::Tbz => {
|
|
writer.put_bytes(self.ops_handle_tbz_masking());
|
|
}
|
|
SpecialCmpLogCase::Tbnz => {
|
|
writer.put_bytes(self.ops_handle_tbnz_masking());
|
|
}
|
|
}
|
|
}
|
|
}
|
|
CmplogOperandType::Regid(reg) => match *reg {
|
|
Aarch64Register::X1 | Aarch64Register::W1 => {}
|
|
Aarch64Register::X0 | Aarch64Register::W0 => {
|
|
writer.put_ldr_reg_reg_offset(Aarch64Register::X1, Aarch64Register::Sp, 0u64);
|
|
}
|
|
_ => {
|
|
if !writer.put_mov_reg_reg(Aarch64Register::X1, *reg) {
|
|
writer.put_mov_reg_reg(Aarch64Register::W1, *reg);
|
|
}
|
|
}
|
|
},
|
|
}
|
|
|
|
//call cmplog runtime to populate the values map
|
|
writer.put_bytes(self.ops_save_register_and_blr_to_populate());
|
|
|
|
// Restore x0, x1
|
|
assert!(writer.put_ldp_reg_reg_reg_offset(
|
|
Aarch64Register::X0,
|
|
Aarch64Register::X1,
|
|
Aarch64Register::Sp,
|
|
16 + i64::from(frida_gum_sys::GUM_RED_ZONE_SIZE),
|
|
IndexMode::PostAdjust,
|
|
));
|
|
}
|
|
|
|
#[cfg(all(feature = "cmplog", target_arch = "x86_64"))]
|
|
#[allow(clippy::similar_names)]
|
|
#[inline]
|
|
/// Check if the current instruction is cmplog relevant one(any opcode which sets the flags)
|
|
#[must_use]
|
|
pub fn cmplog_is_interesting_instruction(
|
|
_decoder: InstDecoder,
|
|
_address: u64,
|
|
instr: &Insn,
|
|
) -> Option<(
|
|
CmplogOperandType,
|
|
CmplogOperandType,
|
|
Option<SpecialCmpLogCase>,
|
|
Option<SpecialCmpLogCase>,
|
|
)> {
|
|
let bytes = instr.bytes();
|
|
let mut decoder =
|
|
iced_x86::Decoder::with_ip(64, bytes, instr.address(), iced_x86::DecoderOptions::NONE);
|
|
if !decoder.can_decode() {
|
|
return None;
|
|
}
|
|
let mut instruction = iced_x86::Instruction::default();
|
|
decoder.decode_out(&mut instruction);
|
|
match instruction.mnemonic() {
|
|
iced_x86::Mnemonic::Cmp | iced_x86::Mnemonic::Sub => {} // continue
|
|
_ => return None,
|
|
}
|
|
|
|
if instruction.op_count() != 2 {
|
|
return None;
|
|
}
|
|
|
|
// we don't support rip related reference with index register yet
|
|
if instruction.memory_base() == Register::RIP
|
|
&& instruction.memory_index() != Register::None
|
|
{
|
|
return None;
|
|
}
|
|
|
|
if instruction.memory_size() == MemorySize::UInt8
|
|
|| instruction.memory_size() == MemorySize::Int8
|
|
{
|
|
return None;
|
|
}
|
|
|
|
let op1 = match instruction.op0_kind() {
|
|
OpKind::Register => CmplogOperandType::Reg(instruction.op0_register()),
|
|
OpKind::Immediate16
|
|
| OpKind::Immediate32
|
|
| OpKind::Immediate64
|
|
| OpKind::Immediate32to64 => CmplogOperandType::Imm(instruction.immediate(0)),
|
|
OpKind::Memory => {
|
|
// can't use try_into here, since we need to cast u64 to i64
|
|
// which is fine in this case
|
|
#[allow(clippy::cast_possible_wrap)]
|
|
CmplogOperandType::Mem(
|
|
instruction.memory_base(),
|
|
instruction.memory_index(),
|
|
instruction.memory_displacement64() as i64,
|
|
instruction.memory_index_scale(),
|
|
instruction.memory_size(),
|
|
)
|
|
}
|
|
_ => {
|
|
return None;
|
|
}
|
|
};
|
|
|
|
let op2 = match instruction.op1_kind() {
|
|
OpKind::Register => CmplogOperandType::Reg(instruction.op1_register()),
|
|
OpKind::Immediate16
|
|
| OpKind::Immediate32
|
|
| OpKind::Immediate64
|
|
| OpKind::Immediate32to64 => CmplogOperandType::Imm(instruction.immediate(1)),
|
|
OpKind::Memory =>
|
|
{
|
|
#[allow(clippy::cast_possible_wrap)]
|
|
CmplogOperandType::Mem(
|
|
instruction.memory_base(),
|
|
instruction.memory_index(),
|
|
instruction.memory_displacement64() as i64,
|
|
instruction.memory_index_scale(),
|
|
instruction.memory_size(),
|
|
)
|
|
}
|
|
_ => {
|
|
return None;
|
|
}
|
|
};
|
|
|
|
// debug print, shows all the cmp instrumented instructions
|
|
if log::log_enabled!(log::Level::Debug) {
|
|
use iced_x86::{Formatter, NasmFormatter};
|
|
let mut formatter = NasmFormatter::new();
|
|
let mut output = String::new();
|
|
formatter.format(&instruction, &mut output);
|
|
log::debug!(
|
|
"inst: {:x} {:?}, {:?} {:?}",
|
|
instruction.ip(),
|
|
output,
|
|
op1,
|
|
op2
|
|
);
|
|
}
|
|
|
|
Some((op1, op2, None, None))
|
|
}
|
|
|
|
#[cfg(all(feature = "cmplog", target_arch = "aarch64"))]
|
|
#[allow(clippy::similar_names)]
|
|
#[inline]
|
|
/// Check if the current instruction is cmplog relevant one(any opcode which sets the flags)
|
|
#[must_use]
|
|
pub fn cmplog_is_interesting_instruction(
|
|
decoder: InstDecoder,
|
|
_address: u64,
|
|
instr: &Insn,
|
|
) -> Option<(
|
|
CmplogOperandType,
|
|
CmplogOperandType,
|
|
Option<(ShiftStyle, u8)>, //possible shifts: everything except MSL
|
|
Option<SpecialCmpLogCase>,
|
|
)> {
|
|
let mut instr = disas_count(&decoder, instr.bytes(), 1)[0];
|
|
let operands_len = instr
|
|
.operands
|
|
.iter()
|
|
.position(|item| *item == Operand::Nothing)
|
|
.unwrap_or_else(|| 4);
|
|
// "cmp" | "ands" | "subs" | "adds" | "negs" | "ngcs" | "sbcs" | "bics" | "cbz"
|
|
// | "cbnz" | "tbz" | "tbnz" | "adcs" - yaxpeax aliases insns (i.e., cmp -> subs)
|
|
// We only care for compare instructions - aka instructions which set the flags
|
|
match instr.opcode {
|
|
Opcode::SUBS
|
|
| Opcode::ANDS
|
|
| Opcode::ADDS
|
|
| Opcode::SBCS
|
|
| Opcode::BICS
|
|
| Opcode::CBZ
|
|
| Opcode::CBNZ
|
|
| Opcode::TBZ
|
|
| Opcode::TBNZ
|
|
| Opcode::ADC => (),
|
|
_ => return None,
|
|
}
|
|
|
|
// cbz - 1 operand, everything else - 3 operands
|
|
let special_case = [
|
|
Opcode::CBZ,
|
|
Opcode::CBNZ,
|
|
Opcode::TBZ,
|
|
Opcode::TBNZ,
|
|
Opcode::SUBS,
|
|
Opcode::ADDS,
|
|
Opcode::ANDS,
|
|
Opcode::SBCS,
|
|
Opcode::BICS,
|
|
Opcode::ADCS,
|
|
]
|
|
.contains(&instr.opcode);
|
|
//this check is to ensure that there are the right number of operands
|
|
if operands_len != 2 && !special_case {
|
|
return None;
|
|
}
|
|
|
|
// handle special opcodes case which have 3 operands, but the 1st(dest) is not important to us
|
|
////subs", "adds", "ands", "sbcs", "bics", "adcs"
|
|
if [
|
|
Opcode::SUBS,
|
|
Opcode::ADDS,
|
|
Opcode::ANDS,
|
|
Opcode::SBCS,
|
|
Opcode::BICS,
|
|
Opcode::ADCS,
|
|
]
|
|
.contains(&instr.opcode)
|
|
{
|
|
//remove the dest operand from the list
|
|
instr.operands.rotate_left(1);
|
|
instr.operands[3] = Operand::Nothing;
|
|
}
|
|
|
|
// cbz marked as special since there is only 1 operand
|
|
#[allow(clippy::cast_sign_loss)]
|
|
let special_case = matches!(instr.opcode, Opcode::CBZ | Opcode::CBNZ);
|
|
|
|
#[allow(clippy::cast_sign_loss, clippy::similar_names)]
|
|
let operand1 = match instr.operands[0] {
|
|
//the only possibilities are registers for the first operand
|
|
//precompute the aarch64 frida register because it is ambiguous if register=31 means xzr or sp in yaxpeax
|
|
Operand::Register(sizecode, reg) => Some(CmplogOperandType::Regid(writer_register(
|
|
reg, sizecode, true,
|
|
))),
|
|
Operand::RegisterOrSP(sizecode, reg) => Some(CmplogOperandType::Regid(
|
|
writer_register(reg, sizecode, false),
|
|
)),
|
|
_ => panic!("First argument is not a register"), //this should never be possible in arm64
|
|
};
|
|
|
|
#[allow(clippy::cast_sign_loss)]
|
|
let operand2 = if special_case {
|
|
Some((CmplogOperandType::Imm(0), None))
|
|
} else {
|
|
match instr.operands[1] {
|
|
Operand::Register(sizecode, reg) => Some((
|
|
CmplogOperandType::Regid(writer_register(reg, sizecode, true)),
|
|
None,
|
|
)),
|
|
Operand::ImmShift(imm, shift) => {
|
|
Some((CmplogOperandType::Imm((imm as u64) << shift), None))
|
|
} //precalculate the shift
|
|
Operand::RegShift(shiftstyle, amount, regsize, reg) => {
|
|
let reg = CmplogOperandType::Regid(writer_register(reg, regsize, true));
|
|
let shift = (shiftstyle, amount);
|
|
Some((reg, Some(shift)))
|
|
}
|
|
Operand::Immediate(imm) => Some((CmplogOperandType::Imm(imm as u64), None)),
|
|
_ => panic!("Second argument could not be decoded"),
|
|
}
|
|
};
|
|
|
|
// tbz will need to have special handling at emit time(masking operand1 value with operand2)
|
|
let special_case = match instr.opcode {
|
|
Opcode::TBZ => Some(SpecialCmpLogCase::Tbz),
|
|
Opcode::TBNZ => Some(SpecialCmpLogCase::Tbnz),
|
|
_ => None,
|
|
};
|
|
|
|
if let Some(op1) = operand1 {
|
|
operand2.map(|op2| (op1, op2.0, op2.1, special_case))
|
|
} else {
|
|
None
|
|
}
|
|
}
|
|
}
|
|
|
|
impl Default for CmpLogRuntime {
|
|
#[inline]
|
|
fn default() -> Self {
|
|
Self::new()
|
|
}
|
|
}
|