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pci, virtio bugfixes for 2.3

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Just a bunch of bugfixes. Should be nothing remarkable here.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pci, virtio bugfixes for 2.3

Just a bunch of bugfixes. Should be nothing remarkable here.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Wed Mar 18 12:31:03 2015 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  pcie_aer: fix comment to match pcie spec
  pci: fix several trivial typos in comment
  aer: fix a wrong init PCI_ERR_COR_STATUS w1cmask type register
  pcie_aer: fix typos in pcie_aer_inject_error comment
  aer: fix wrong check on expose aer tlp prefix log
  pcie: correct mistaken register bit for End-End TLP Prefix Blocking
  virtio: Fix memory leaks reported by Coverity
  virtio: validate the existence of handle_output before calling it

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2015-03-19 11:12:21 +00:00
commit 2259c16dc2
6 changed files with 12 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hw/pci/pcie.c
View File

@ -84,7 +84,7 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
pci_set_long(exp_cap + PCI_EXP_DEVCAP2, pci_set_long(exp_cap + PCI_EXP_DEVCAP2,
PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
pci_set_word(dev->wmask + pos, PCI_EXP_DEVCTL2_EETLPPB); pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
return pos; return pos;
} }

10
hw/pci/pcie_aer.c
View File

@ -123,7 +123,7 @@ int pcie_aer_init(PCIDevice *dev, uint16_t offset)
PCI_ERR_UNC_SUPPORTED); PCI_ERR_UNC_SUPPORTED);
pci_long_test_and_set_mask(dev->w1cmask + offset + PCI_ERR_COR_STATUS, pci_long_test_and_set_mask(dev->w1cmask + offset + PCI_ERR_COR_STATUS,
PCI_ERR_COR_STATUS); PCI_ERR_COR_SUPPORTED);
pci_set_long(dev->config + offset + PCI_ERR_COR_MASK, pci_set_long(dev->config + offset + PCI_ERR_COR_MASK,
PCI_ERR_COR_MASK_DEFAULT); PCI_ERR_COR_MASK_DEFAULT);
@ -433,7 +433,7 @@ static void pcie_aer_update_log(PCIDevice *dev, const PCIEAERErr *err)
} }
if ((err->flags & PCIE_AER_ERR_TLP_PREFIX_PRESENT) && if ((err->flags & PCIE_AER_ERR_TLP_PREFIX_PRESENT) &&
(pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) & (pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCAP2) &
PCI_EXP_DEVCAP2_EETLPP)) { PCI_EXP_DEVCAP2_EETLPP)) {
for (i = 0; i < ARRAY_SIZE(err->prefix); ++i) { for (i = 0; i < ARRAY_SIZE(err->prefix); ++i) {
/* 7.10.12 tlp prefix log register */ /* 7.10.12 tlp prefix log register */
@ -618,11 +618,11 @@ static bool pcie_aer_inject_uncor_error(PCIEAERInject *inj, bool is_fatal)
* non-Function specific error must be recorded in all functions. * non-Function specific error must be recorded in all functions.
* It is the responsibility of the caller of this function. * It is the responsibility of the caller of this function.
* It is also caller's responsibility to determine which function should * It is also caller's responsibility to determine which function should
* report the rerror. * report the error.
* *
* 6.2.4 Error Logging * 6.2.4 Error Logging
* 6.2.5 Sqeunce of Device Error Signaling and Logging Operations * 6.2.5 Sequence of Device Error Signaling and Logging Operations
* table 6-2: Flowchard Showing Sequence of Device Error Signaling and Logging * Figure 6-2: Flowchart Showing Sequence of Device Error Signaling and Logging
* Operations * Operations
*/ */
int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err) int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err)

3
hw/virtio/virtio.c
View File

@ -759,8 +759,9 @@ void virtio_queue_set_align(VirtIODevice *vdev, int n, int align)
void virtio_queue_notify_vq(VirtQueue *vq) void virtio_queue_notify_vq(VirtQueue *vq)
{ {
if (vq->vring.desc) { if (vq->vring.desc && vq->handle_output) {
VirtIODevice *vdev = vq->vdev; VirtIODevice *vdev = vq->vdev;
trace_virtio_queue_notify(vdev, vq - vdev->vq, vq); trace_virtio_queue_notify(vdev, vq - vdev->vq, vq);
vq->handle_output(vdev, vq); vq->handle_output(vdev, vq);
} }

2
include/hw/pci/pci.h
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@ -137,7 +137,7 @@ enum {
#define PCI_CONFIG_HEADER_SIZE 0x40 #define PCI_CONFIG_HEADER_SIZE 0x40
/* Size of the standard PCI config space */ /* Size of the standard PCI config space */
#define PCI_CONFIG_SPACE_SIZE 0x100 #define PCI_CONFIG_SPACE_SIZE 0x100
/* Size of the standart PCIe config space: 4KB */ /* Size of the standard PCIe config space: 4KB */
#define PCIE_CONFIG_SPACE_SIZE 0x1000 #define PCIE_CONFIG_SPACE_SIZE 0x1000
#define PCI_NUM_PINS 4 /* A-D */ #define PCI_NUM_PINS 4 /* A-D */

2
include/hw/pci/pcie_aer.h
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@ -51,7 +51,7 @@ struct PCIEAERLog {
PCIEAERErr *log; PCIEAERErr *log;
}; };
/* aer error message: error signaling message has only error sevirity and /* aer error message: error signaling message has only error severity and
source id. See 2.2.8.3 error signaling messages */ source id. See 2.2.8.3 error signaling messages */
struct PCIEAERMsg { struct PCIEAERMsg {
/* /*

2
include/hw/pci/pcie_regs.h
View File

@ -72,7 +72,7 @@
#define PCI_EXP_DEVCAP2_EFF 0x100000 #define PCI_EXP_DEVCAP2_EFF 0x100000
#define PCI_EXP_DEVCAP2_EETLPP 0x200000 #define PCI_EXP_DEVCAP2_EETLPP 0x200000
#define PCI_EXP_DEVCTL2_EETLPPB 0x80 #define PCI_EXP_DEVCTL2_EETLPPB 0x8000
/* ARI */ /* ARI */
#define PCI_ARI_VER 1 #define PCI_ARI_VER 1