target/arm: Fix sve_uzp_p vs odd vector lengths
Missed out on compressing the second half of a predicate with length vl % 512 > 256. Adjust all of the x + (y << s) to x | (y << s) as a general style fix. Drop the extract64 because the input uint64_t are known to be already zero-extended from the current size of the predicate. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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				@ -1939,7 +1939,7 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
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    if (oprsz <= 8) {
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        l = compress_bits(n[0] >> odd, esz);
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        h = compress_bits(m[0] >> odd, esz);
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        d[0] = extract64(l + (h << (4 * oprsz)), 0, 8 * oprsz);
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        d[0] = l | (h << (4 * oprsz));
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    } else {
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        ARMPredicateReg tmp_m;
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        intptr_t oprsz_16 = oprsz / 16;
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@ -1953,23 +1953,35 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
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            h = n[2 * i + 1];
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            l = compress_bits(l >> odd, esz);
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            h = compress_bits(h >> odd, esz);
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            d[i] = l + (h << 32);
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            d[i] = l | (h << 32);
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        }
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        /* For VL which is not a power of 2, the results from M do not
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           align nicely with the uint64_t for D.  Put the aligned results
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           from M into TMP_M and then copy it into place afterward.  */
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        /*
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         * For VL which is not a multiple of 512, the results from M do not
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         * align nicely with the uint64_t for D.  Put the aligned results
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         * from M into TMP_M and then copy it into place afterward.
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         */
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        if (oprsz & 15) {
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            d[i] = compress_bits(n[2 * i] >> odd, esz);
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            int final_shift = (oprsz & 15) * 2;
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            l = n[2 * i + 0];
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            h = n[2 * i + 1];
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            l = compress_bits(l >> odd, esz);
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            h = compress_bits(h >> odd, esz);
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            d[i] = l | (h << final_shift);
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            for (i = 0; i < oprsz_16; i++) {
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                l = m[2 * i + 0];
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                h = m[2 * i + 1];
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                l = compress_bits(l >> odd, esz);
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                h = compress_bits(h >> odd, esz);
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                tmp_m.p[i] = l + (h << 32);
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                tmp_m.p[i] = l | (h << 32);
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            }
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            tmp_m.p[i] = compress_bits(m[2 * i] >> odd, esz);
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            l = m[2 * i + 0];
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            h = m[2 * i + 1];
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            l = compress_bits(l >> odd, esz);
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            h = compress_bits(h >> odd, esz);
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            tmp_m.p[i] = l | (h << final_shift);
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            swap_memmove(vd + oprsz / 2, &tmp_m, oprsz / 2);
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        } else {
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@ -1978,7 +1990,7 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
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                h = m[2 * i + 1];
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                l = compress_bits(l >> odd, esz);
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                h = compress_bits(h >> odd, esz);
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                d[oprsz_16 + i] = l + (h << 32);
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                d[oprsz_16 + i] = l | (h << 32);
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            }
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        }
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    }
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