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i2c: Don't check return value from i2c_recv()

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i2c_recv() cannot fail, so there is no need to check the return
value.  It also returns unt8_t, so comparing with < 0 is not
meaningful.

Fix up various I2C controllers to remove the unneeded code.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Corey Minyard 2018-11-20 11:13:42 -06:00
parent 05f9f17e2c
commit bc15cde0c4
3 changed files with 5 additions and 24 deletions
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9
hw/i2c/aspeed_i2c.c
View File

@ -189,16 +189,11 @@ static uint8_t aspeed_i2c_get_state(AspeedI2CBus *bus)
static void aspeed_i2c_handle_rx_cmd(AspeedI2CBus *bus) static void aspeed_i2c_handle_rx_cmd(AspeedI2CBus *bus)
{ {
int ret; uint8_t ret;
aspeed_i2c_set_state(bus, I2CD_MRXD); aspeed_i2c_set_state(bus, I2CD_MRXD);
ret = i2c_recv(bus->bus); ret = i2c_recv(bus->bus);
if (ret < 0) { bus->intr_status |= I2CD_INTR_RX_DONE;
qemu_log_mask(LOG_GUEST_ERROR, "%s: read failed\n", __func__);
ret = 0xff;
} else {
bus->intr_status |= I2CD_INTR_RX_DONE;
}
bus->buf = (ret & I2CD_BYTE_BUF_RX_MASK) << I2CD_BYTE_BUF_RX_SHIFT; bus->buf = (ret & I2CD_BYTE_BUF_RX_MASK) << I2CD_BYTE_BUF_RX_SHIFT;
if (bus->cmd & I2CD_M_S_RX_CMD_LAST) { if (bus->cmd & I2CD_M_S_RX_CMD_LAST) {
i2c_nack(bus->bus); i2c_nack(bus->bus);

8
hw/i2c/exynos4210_i2c.c
View File

@ -106,16 +106,10 @@ static inline void exynos4210_i2c_raise_interrupt(Exynos4210I2CState *s)
static void exynos4210_i2c_data_receive(void *opaque) static void exynos4210_i2c_data_receive(void *opaque)
{ {
Exynos4210I2CState *s = (Exynos4210I2CState *)opaque; Exynos4210I2CState *s = (Exynos4210I2CState *)opaque;
int ret;
s->i2cstat &= ~I2CSTAT_LAST_BIT; s->i2cstat &= ~I2CSTAT_LAST_BIT;
s->scl_free = false; s->scl_free = false;
ret = i2c_recv(s->bus); s->i2cds = i2c_recv(s->bus);
if (ret < 0 && (s->i2ccon & I2CCON_ACK_GEN)) {
s->i2cstat |= I2CSTAT_LAST_BIT; /* Data is not acknowledged */
} else {
s->i2cds = ret;
}
exynos4210_i2c_raise_interrupt(s); exynos4210_i2c_raise_interrupt(s);
} }

12
hw/i2c/imx_i2c.c
View File

@ -120,7 +120,7 @@ static uint64_t imx_i2c_read(void *opaque, hwaddr offset,
value = s->i2dr_read; value = s->i2dr_read;
if (imx_i2c_is_master(s)) { if (imx_i2c_is_master(s)) {
int ret = 0xff; uint8_t ret = 0xff;
if (s->address == ADDR_RESET) { if (s->address == ADDR_RESET) {
/* something is wrong as the address is not set */ /* something is wrong as the address is not set */
@ -133,15 +133,7 @@ static uint64_t imx_i2c_read(void *opaque, hwaddr offset,
} else { } else {
/* get the next byte */ /* get the next byte */
ret = i2c_recv(s->bus); ret = i2c_recv(s->bus);
imx_i2c_raise_interrupt(s);
if (ret >= 0) {
imx_i2c_raise_interrupt(s);
} else {
qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: read failed "
"for device 0x%02x\n", TYPE_IMX_I2C,
__func__, s->address);
ret = 0xff;
}
} }
s->i2dr_read = ret; s->i2dr_read = ret;