SYS-OSS/FRET-qemu
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

cpu: Change qemu_init_vcpu() argument to CPUState

Browse Source 
This allows to move the call into CPUState's realizefn.
Therefore move the stub into libqemustub.a.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-05-27 03:23:24 +02:00
parent 10a9021dfd
commit c643bed99f
21 changed files with 17 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
cpus.c
View File

@ -1053,11 +1053,8 @@ static void qemu_dummy_start_vcpu(CPUState *cpu)
} }
} }
void qemu_init_vcpu(void *_env) void qemu_init_vcpu(CPUState *cpu)
{ {
CPUArchState *env = _env;
CPUState *cpu = ENV_GET_CPU(env);
cpu->nr_cores = smp_cores; cpu->nr_cores = smp_cores;
cpu->nr_threads = smp_threads; cpu->nr_threads = smp_threads;
cpu->stopped = true; cpu->stopped = true;

8
include/qemu-common.h
View File

@ -295,14 +295,6 @@ struct qemu_work_item {
int done; int done;
}; };
#ifdef CONFIG_USER_ONLY
static inline void qemu_init_vcpu(void *env)
{
}
#else
void qemu_init_vcpu(void *env);
#endif
/** /**
* Sends a (part of) iovec down a socket, yielding when the socket is full, or * Sends a (part of) iovec down a socket, yielding when the socket is full, or

8
include/qom/cpu.h
View File

@ -428,6 +428,14 @@ void cpu_exit(CPUState *cpu);
*/ */
void cpu_resume(CPUState *cpu); void cpu_resume(CPUState *cpu);
/**
* qemu_init_vcpu:
* @cpu: The vCPU to initialize.
*
* Initializes a vCPU.
*/
void qemu_init_vcpu(CPUState *cpu);
#ifdef CONFIG_SOFTMMU #ifdef CONFIG_SOFTMMU
extern const struct VMStateDescription vmstate_cpu_common; extern const struct VMStateDescription vmstate_cpu_common;
#else #else

2
qom/cpu.c
View File

@ -209,6 +209,8 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
{ {
CPUState *cpu = CPU(dev); CPUState *cpu = CPU(dev);
qemu_init_vcpu(cpu);
if (dev->hotplugged) { if (dev->hotplugged) {
cpu_synchronize_post_init(cpu); cpu_synchronize_post_init(cpu);
notifier_list_notify(&cpu_added_notifiers, dev); notifier_list_notify(&cpu_added_notifiers, dev);

4
stubs/cpus.c
View File

@ -4,3 +4,7 @@
void cpu_resume(CPUState *cpu) void cpu_resume(CPUState *cpu)
{ {
} }
void qemu_init_vcpu(CPUState *cpu)
{
}

3
target-alpha/cpu.c
View File

@ -26,11 +26,8 @@
static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
{ {
AlphaCPU *cpu = ALPHA_CPU(dev);
AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev); AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
acc->parent_realize(dev, errp); acc->parent_realize(dev, errp);
} }

1
target-arm/cpu.c
View File

@ -208,7 +208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
init_cpreg_list(cpu); init_cpreg_list(cpu);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(env);
acc->parent_realize(dev, errp); acc->parent_realize(dev, errp);
} }

1
target-cris/cpu.c
View File

@ -139,7 +139,6 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev); CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
ccc->parent_realize(dev, errp); ccc->parent_realize(dev, errp);
} }

1
target-i386/cpu.c
View File

@ -2392,7 +2392,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
#endif #endif
mce_init(cpu); mce_init(cpu);
qemu_init_vcpu(&cpu->env);
x86_cpu_apic_realize(cpu, &local_err); x86_cpu_apic_realize(cpu, &local_err);
if (local_err != NULL) { if (local_err != NULL) {

2
target-lm32/cpu.c
View File

@ -49,8 +49,6 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
lcc->parent_realize(dev, errp); lcc->parent_realize(dev, errp);
} }

1
target-m68k/cpu.c
View File

@ -147,7 +147,6 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
m68k_cpu_init_gdb(cpu); m68k_cpu_init_gdb(cpu);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
mcc->parent_realize(dev, errp); mcc->parent_realize(dev, errp);
} }

1
target-microblaze/cpu.c
View File

@ -92,7 +92,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev); MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
mcc->parent_realize(dev, errp); mcc->parent_realize(dev, errp);
} }

1
target-mips/cpu.c
View File

@ -48,7 +48,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
mcc->parent_realize(dev, errp); mcc->parent_realize(dev, errp);
} }

5
target-moxie/cpu.c
View File

@ -44,12 +44,11 @@ static void moxie_cpu_reset(CPUState *s)
static void moxie_cpu_realizefn(DeviceState *dev, Error **errp) static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
{ {
MoxieCPU *cpu = MOXIE_CPU(dev); MoxieCPU *cpu = MOXIE_CPU(dev);
MoxieCPUClass *occ = MOXIE_CPU_GET_CLASS(dev); MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
occ->parent_realize(dev, errp); mcc->parent_realize(dev, errp);
} }
static void moxie_cpu_initfn(Object *obj) static void moxie_cpu_initfn(Object *obj)

1
target-openrisc/cpu.c
View File

@ -67,7 +67,6 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
OpenRISCCPU *cpu = OPENRISC_CPU(dev); OpenRISCCPU *cpu = OPENRISC_CPU(dev);
OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev); OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
occ->parent_realize(dev, errp); occ->parent_realize(dev, errp);

2
target-ppc/translate_init.c
View File

@ -7752,8 +7752,6 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
34, "power-spe.xml", 0); 34, "power-spe.xml", 0);
} }
qemu_init_vcpu(env);
pcc->parent_realize(dev, errp); pcc->parent_realize(dev, errp);
#if defined(PPC_DUMP_CPU) #if defined(PPC_DUMP_CPU)

1
target-s390x/cpu.c
View File

@ -102,7 +102,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
S390CPU *cpu = S390_CPU(dev); S390CPU *cpu = S390_CPU(dev);
S390CPUClass *scc = S390_CPU_GET_CLASS(dev); S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
scc->parent_realize(dev, errp); scc->parent_realize(dev, errp);

1
target-sh4/cpu.c
View File

@ -234,7 +234,6 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev); SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev);
cpu_reset(CPU(cpu)); cpu_reset(CPU(cpu));
qemu_init_vcpu(&cpu->env);
scc->parent_realize(dev, errp); scc->parent_realize(dev, errp);
} }

3
target-sparc/cpu.c
View File

@ -730,11 +730,8 @@ void sparc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
{ {
SPARCCPU *cpu = SPARC_CPU(dev);
SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev); SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
scc->parent_realize(dev, errp); scc->parent_realize(dev, errp);
} }

3
target-unicore32/cpu.c
View File

@ -83,11 +83,8 @@ static const UniCore32CPUInfo uc32_cpus[] = {
static void uc32_cpu_realizefn(DeviceState *dev, Error **errp) static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
{ {
UniCore32CPU *cpu = UNICORE32_CPU(dev);
UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev); UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
ucc->parent_realize(dev, errp); ucc->parent_realize(dev, errp);
} }

3
target-xtensa/cpu.c
View File

@ -59,11 +59,8 @@ static void xtensa_cpu_reset(CPUState *s)
static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
{ {
XtensaCPU *cpu = XTENSA_CPU(dev);
XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev); XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
xcc->parent_realize(dev, errp); xcc->parent_realize(dev, errp);
} }