Implement AArch64 view of the CONTEXTIDR register. We tighten up the condition when we flush the TLB on a CONTEXTIDR write to avoid needlessly flushing the TLB every time on a 64 bit system (and also on a 32 bit system using LPAE, as a bonus). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org - QEMU team
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