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		d7754940d7
		
	
	
	
	
		
			
			tcg/loongarch64: Generate LSX instructions fpu: Add conversions between bfloat16 and [u]int8 fpu: Handle m68k extended precision denormals properly accel/tcg: Improve cputlb i/o organization accel/tcg: Simplify tlb_plugin_lookup accel/tcg: Remove false-negative halted assertion tcg: Add gvec compare with immediate and scalar operand tcg/aarch64: Emit BTI insns at jump landing pads -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmUF4VIdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8wOwf+I9qNus2kV3yQxpuU 2hqYuLXvH96l9vbqaoyx7hyyJTtrqytLGCMPmQKUdtBGtO6z7PnLNDiooGcbO+gw 2gdfw3Q//JZUTdx+ZSujUksV0F96Tqu0zi4TdJUPNIwhCrh0K8VjiftfPfbynRtz KhQ1lNeO/QzcAgzKiun2NyqdPiYDmNuEIS/jYedQwQweRp/xQJ4/x8DmhGf/OiD4 rGAcdslN+RenqgFACcJ2A1vxUGMeQv5g/Cn82FgTk0cmgcfAODMnC+WnOm8ruQdT snluvnh/2/r8jIhx3frKDKGtaKHCPhoCS7GNK48qejxaybvv3CJQ4qsjRIBKVrVM cIrsSw== =cTgD -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into staging *: Delete checks for old host definitions tcg/loongarch64: Generate LSX instructions fpu: Add conversions between bfloat16 and [u]int8 fpu: Handle m68k extended precision denormals properly accel/tcg: Improve cputlb i/o organization accel/tcg: Simplify tlb_plugin_lookup accel/tcg: Remove false-negative halted assertion tcg: Add gvec compare with immediate and scalar operand tcg/aarch64: Emit BTI insns at jump landing pads [Resolved conflict between CPUINFO_PMULL and CPUINFO_BTI. --Stefan] * tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu: (39 commits) tcg: Map code_gen_buffer with PROT_BTI tcg/aarch64: Emit BTI insns at jump landing pads util/cpuinfo-aarch64: Add CPUINFO_BTI tcg: Add tcg_out_tb_start backend hook fpu: Handle m68k extended precision denormals properly fpu: Add conversions between bfloat16 and [u]int8 accel/tcg: Introduce do_st16_mmio_leN accel/tcg: Introduce do_ld16_mmio_beN accel/tcg: Merge io_writex into do_st_mmio_leN accel/tcg: Merge io_readx into do_ld_mmio_beN accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1 accel/tcg: Merge cpu_transaction_failed into io_failed plugin: Simplify struct qemu_plugin_hwaddr accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed accel/tcg: Split out io_prepare and io_failed accel/tcg: Simplify tlb_plugin_lookup target/arm: Use tcg_gen_gvec_cmpi for compare vs 0 tcg: Add gvec compare with immediate and scalar operand tcg/loongarch64: Implement 128-bit load & store tcg/loongarch64: Lower rotli_vec to vrotri ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
		
			
				
	
	
		
			79 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			79 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * SPDX-License-Identifier: GPL-2.0-or-later
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|  * Host specific cpu identification for AArch64.
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "host/cpuinfo.h"
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| 
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| #ifdef CONFIG_LINUX
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| # ifdef CONFIG_GETAUXVAL
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| #  include <sys/auxv.h>
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| # else
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| #  include <asm/hwcap.h>
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| #  include "elf.h"
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| # endif
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| # ifndef HWCAP2_BTI
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| #  define HWCAP2_BTI 0  /* added in glibc 2.32 */
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| # endif
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| #endif
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| #ifdef CONFIG_DARWIN
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| # include <sys/sysctl.h>
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| #endif
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| 
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| unsigned cpuinfo;
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| 
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| #ifdef CONFIG_DARWIN
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| static bool sysctl_for_bool(const char *name)
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| {
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|     int val = 0;
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|     size_t len = sizeof(val);
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| 
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|     if (sysctlbyname(name, &val, &len, NULL, 0) == 0) {
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|         return val != 0;
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|     }
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| 
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|     /*
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|      * We might in the future ask for properties not present in older kernels,
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|      * but we're only asking about static properties, all of which should be
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|      * 'int'.  So we shouldn't see ENOMEM (val too small), or any of the other
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|      * more exotic errors.
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|      */
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|     assert(errno == ENOENT);
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|     return false;
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| }
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| #endif
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| 
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| /* Called both as constructor and (possibly) via other constructors. */
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| unsigned __attribute__((constructor)) cpuinfo_init(void)
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| {
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|     unsigned info = cpuinfo;
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| 
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|     if (info) {
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|         return info;
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|     }
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| 
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|     info = CPUINFO_ALWAYS;
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| 
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| #ifdef CONFIG_LINUX
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|     unsigned long hwcap = qemu_getauxval(AT_HWCAP);
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|     info |= (hwcap & HWCAP_ATOMICS ? CPUINFO_LSE : 0);
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|     info |= (hwcap & HWCAP_USCAT ? CPUINFO_LSE2 : 0);
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|     info |= (hwcap & HWCAP_AES ? CPUINFO_AES : 0);
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|     info |= (hwcap & HWCAP_PMULL ? CPUINFO_PMULL : 0);
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| 
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|     unsigned long hwcap2 = qemu_getauxval(AT_HWCAP2);
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|     info |= (hwcap2 & HWCAP2_BTI ? CPUINFO_BTI : 0);
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| #endif
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| #ifdef CONFIG_DARWIN
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|     info |= sysctl_for_bool("hw.optional.arm.FEAT_LSE") * CPUINFO_LSE;
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|     info |= sysctl_for_bool("hw.optional.arm.FEAT_LSE2") * CPUINFO_LSE2;
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|     info |= sysctl_for_bool("hw.optional.arm.FEAT_AES") * CPUINFO_AES;
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|     info |= sysctl_for_bool("hw.optional.arm.FEAT_PMULL") * CPUINFO_PMULL;
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|     info |= sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI;
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| #endif
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| 
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|     cpuinfo = info;
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|     return info;
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| }
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