b3d4ef8348
In order to support additional channels of communication using `-serial`, add several serial ports, up to the standard 4 generally supported by the 8250 driver. Fixed: https://lore.kernel.org/all/20240907143439.2792924-1-Jason@zx2c4.com/ Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Tested-by: Bibo Mao <maobibo@loongson.cn> [gaosong: ACPI uart need't reverse order] Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240907143439.2792924-1-Jason@zx2c4.com>
54 lines
1.8 KiB
C
54 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* QEMU LoongArch CPU
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef HW_LS7A_H
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#define HW_LS7A_H
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#include "hw/pci-host/pam.h"
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#include "qemu/units.h"
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#include "qemu/range.h"
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#include "qom/object.h"
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#define VIRT_PCI_MEM_BASE 0x40000000UL
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#define VIRT_PCI_MEM_SIZE 0x40000000UL
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#define VIRT_PCI_IO_OFFSET 0x4000
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#define VIRT_PCI_CFG_BASE 0x20000000
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#define VIRT_PCI_CFG_SIZE 0x08000000
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#define VIRT_PCI_IO_BASE 0x18004000UL
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#define VIRT_PCI_IO_SIZE 0xC000
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#define VIRT_PCH_REG_BASE 0x10000000UL
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#define VIRT_IOAPIC_REG_BASE (VIRT_PCH_REG_BASE)
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#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
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#define VIRT_PCH_REG_SIZE 0x400
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#define VIRT_PCH_MSI_SIZE 0x8
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/*
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* GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
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* 0 - 15 GSI for ISA devices even if there is no ISA devices
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* 16 - 63 GSI for CPU devices such as timers/perf monitor etc
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* 64 - GSI for external devices
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*/
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#define VIRT_PCH_PIC_IRQ_NUM 32
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#define VIRT_GSI_BASE 64
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#define VIRT_DEVICE_IRQS 16
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#define VIRT_UART_COUNT 4
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#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
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#define VIRT_UART_BASE 0x1fe001e0
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#define VIRT_UART_SIZE 0x100
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#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
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#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
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#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
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#define VIRT_RTC_LEN 0x100
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#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
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#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000
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#define VIRT_PLATFORM_BUS_SIZE 0x2000000
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#define VIRT_PLATFORM_BUS_NUM_IRQS 2
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#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
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#endif
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