40b44316d8
To test the RISC-V IOMMU emulation we'll use its PCI representation. Create a new 'riscv-iommu-pci' libqos device that will be present with CONFIG_RISCV_IOMMU. This config is only available for RISC-V, so this device will only be consumed by the RISC-V libqos machine. Start with basic tests: a PCI sanity check and a reset state register test. The reset test was taken from the RISC-V IOMMU spec chapter 5.2, "Reset behavior". More tests will be added later. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241016204038.649340-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
77 lines
2.1 KiB
C
77 lines
2.1 KiB
C
/*
|
|
* libqos driver riscv-iommu-pci framework
|
|
*
|
|
* Copyright (c) 2024 Ventana Micro Systems Inc.
|
|
*
|
|
* This work is licensed under the terms of the GNU GPL, version 2 or (at your
|
|
* option) any later version. See the COPYING file in the top-level directory.
|
|
*
|
|
*/
|
|
|
|
#include "qemu/osdep.h"
|
|
#include "../libqtest.h"
|
|
#include "qemu/module.h"
|
|
#include "qgraph.h"
|
|
#include "pci.h"
|
|
#include "riscv-iommu.h"
|
|
|
|
static void *riscv_iommu_pci_get_driver(void *obj, const char *interface)
|
|
{
|
|
QRISCVIOMMU *r_iommu_pci = obj;
|
|
|
|
if (!g_strcmp0(interface, "pci-device")) {
|
|
return &r_iommu_pci->dev;
|
|
}
|
|
|
|
fprintf(stderr, "%s not present in riscv_iommu_pci\n", interface);
|
|
g_assert_not_reached();
|
|
}
|
|
|
|
static void riscv_iommu_pci_start_hw(QOSGraphObject *obj)
|
|
{
|
|
QRISCVIOMMU *pci = (QRISCVIOMMU *)obj;
|
|
qpci_device_enable(&pci->dev);
|
|
}
|
|
|
|
static void riscv_iommu_pci_destructor(QOSGraphObject *obj)
|
|
{
|
|
QRISCVIOMMU *pci = (QRISCVIOMMU *)obj;
|
|
qpci_iounmap(&pci->dev, pci->reg_bar);
|
|
}
|
|
|
|
static void *riscv_iommu_pci_create(void *pci_bus, QGuestAllocator *alloc,
|
|
void *addr)
|
|
{
|
|
QRISCVIOMMU *r_iommu_pci = g_new0(QRISCVIOMMU, 1);
|
|
QPCIBus *bus = pci_bus;
|
|
|
|
qpci_device_init(&r_iommu_pci->dev, bus, addr);
|
|
r_iommu_pci->reg_bar = qpci_iomap(&r_iommu_pci->dev, 0, NULL);
|
|
|
|
r_iommu_pci->obj.get_driver = riscv_iommu_pci_get_driver;
|
|
r_iommu_pci->obj.start_hw = riscv_iommu_pci_start_hw;
|
|
r_iommu_pci->obj.destructor = riscv_iommu_pci_destructor;
|
|
return &r_iommu_pci->obj;
|
|
}
|
|
|
|
static void riscv_iommu_pci_register_nodes(void)
|
|
{
|
|
QPCIAddress addr = {
|
|
.vendor_id = RISCV_IOMMU_PCI_VENDOR_ID,
|
|
.device_id = RISCV_IOMMU_PCI_DEVICE_ID,
|
|
.devfn = QPCI_DEVFN(1, 0),
|
|
};
|
|
|
|
QOSGraphEdgeOptions opts = {
|
|
.extra_device_opts = "addr=01.0",
|
|
};
|
|
|
|
add_qpci_address(&opts, &addr);
|
|
|
|
qos_node_create_driver("riscv-iommu-pci", riscv_iommu_pci_create);
|
|
qos_node_produces("riscv-iommu-pci", "pci-device");
|
|
qos_node_consumes("riscv-iommu-pci", "pci-bus", &opts);
|
|
}
|
|
|
|
libqos_init(riscv_iommu_pci_register_nodes);
|