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			According to cxl_interleave_ways_enc(), fw->num_targets is allowed to be up
to 16. This also corresponds to CXL r3.0 spec. So, the fw->target_hbs[]
array is iterated from 0 to 15. But it is statically declared of length 8.
Thus, out of bound array access may occur.
Fixes: c28db9e000 ("hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV")
Signed-off-by: Dmitry Frolov <frolov@swemel.ru>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Link: https://lore.kernel.org/r/20230913101055.754709-1-frolov@swemel.ru
Cc: qemu-stable@nongnu.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
		
	
			
		
			
				
	
	
		
			65 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU CXL Support
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|  *
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|  * Copyright (c) 2020 Intel
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|  *
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|  * This work is licensed under the terms of the GNU GPL, version 2. See the
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|  * COPYING file in the top-level directory.
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|  */
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| 
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| #ifndef CXL_H
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| #define CXL_H
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| 
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| 
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| #include "qapi/qapi-types-machine.h"
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| #include "qapi/qapi-visit-machine.h"
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| #include "hw/pci/pci_host.h"
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| #include "cxl_pci.h"
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| #include "cxl_component.h"
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| #include "cxl_device.h"
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| 
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| #define CXL_CACHE_LINE_SIZE 64
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| #define CXL_COMPONENT_REG_BAR_IDX 0
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| #define CXL_DEVICE_REG_BAR_IDX 2
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| 
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| #define CXL_WINDOW_MAX 10
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| 
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| typedef struct PXBCXLDev PXBCXLDev;
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| 
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| typedef struct CXLFixedWindow {
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|     uint64_t size;
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|     char **targets;
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|     PXBCXLDev *target_hbs[16];
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|     uint8_t num_targets;
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|     uint8_t enc_int_ways;
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|     uint8_t enc_int_gran;
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|     /* Todo: XOR based interleaving */
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|     MemoryRegion mr;
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|     hwaddr base;
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| } CXLFixedWindow;
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| 
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| typedef struct CXLState {
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|     bool is_enabled;
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|     MemoryRegion host_mr;
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|     unsigned int next_mr_idx;
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|     GList *fixed_windows;
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|     CXLFixedMemoryWindowOptionsList *cfmw_list;
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| } CXLState;
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| 
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| struct CXLHost {
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|     PCIHostState parent_obj;
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| 
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|     CXLComponentState cxl_cstate;
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|     bool passthrough;
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| };
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| 
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| #define TYPE_PXB_CXL_HOST "pxb-cxl-host"
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| OBJECT_DECLARE_SIMPLE_TYPE(CXLHost, PXB_CXL_HOST)
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| 
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| #define TYPE_CXL_USP "cxl-upstream"
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| 
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| typedef struct CXLUpstreamPort CXLUpstreamPort;
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| DECLARE_INSTANCE_CHECKER(CXLUpstreamPort, CXL_USP, TYPE_CXL_USP)
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| CXLComponentState *cxl_usp_to_cstate(CXLUpstreamPort *usp);
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| #endif
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