0acd4ab849
Fix a crash with LTP testsuite and aarch64:
tst_test.c:1015: INFO: Timeout per run is 0h 05m 00s
qemu-aarch64: .../qemu/accel/tcg/translate-all.c:2522: page_check_range: Assertion `start < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS)' failed.
qemu:handle_cpu_signal received signal outside vCPU context @ pc=0x60001554
page_check_range() should never be called with address outside the guest
address space. This patch adds a guest_addr_valid() check in access_ok()
to only call page_check_range() with a valid address.
Fixes: f6768aa1b4c6 ("target/arm: fix AArch64 virtual address space size")
Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20190704084115.24713-1-lvivier@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
477 lines
11 KiB
C
477 lines
11 KiB
C
/*
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* Software MMU support
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*
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* Generate inline load/store functions for all MMU modes (typically
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* at least _user and _kernel) as well as _data versions, for all data
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* sizes.
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*
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* Used by target op helpers.
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*
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* The syntax for the accessors is:
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*
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* load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
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*
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* store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)
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*
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* sign is:
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* (empty): for 32 and 64 bit sizes
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* u : unsigned
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* s : signed
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*
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* size is:
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* b: 8 bits
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* w: 16 bits
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* l: 32 bits
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* q: 64 bits
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*
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* mmusuffix is one of the generic suffixes "data" or "code", or
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* (for softmmu configs) a target-specific MMU mode suffix as defined
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* in target cpu.h.
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*/
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#ifndef CPU_LDST_H
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#define CPU_LDST_H
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#if defined(CONFIG_USER_ONLY)
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/* sparc32plus has 64bit long but 32bit space address
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* this can make bad result with g2h() and h2g()
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*/
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#if TARGET_VIRT_ADDR_SPACE_BITS <= 32
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typedef uint32_t abi_ptr;
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#define TARGET_ABI_FMT_ptr "%x"
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#else
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typedef uint64_t abi_ptr;
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#define TARGET_ABI_FMT_ptr "%"PRIx64
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#endif
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/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
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#define g2h(x) ((void *)((unsigned long)(abi_ptr)(x) + guest_base))
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#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
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#define guest_addr_valid(x) (1)
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#else
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#define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX)
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#endif
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#define h2g_valid(x) guest_addr_valid((unsigned long)(x) - guest_base)
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static inline int guest_range_valid(unsigned long start, unsigned long len)
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{
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return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1;
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}
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#define h2g_nocheck(x) ({ \
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unsigned long __ret = (unsigned long)(x) - guest_base; \
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(abi_ptr)__ret; \
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})
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#define h2g(x) ({ \
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/* Check if given address fits target address space */ \
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assert(h2g_valid(x)); \
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h2g_nocheck(x); \
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})
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#else
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typedef target_ulong abi_ptr;
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#define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx
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#endif
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#if defined(CONFIG_USER_ONLY)
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extern __thread uintptr_t helper_retaddr;
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static inline void set_helper_retaddr(uintptr_t ra)
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{
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helper_retaddr = ra;
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/*
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* Ensure that this write is visible to the SIGSEGV handler that
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* may be invoked due to a subsequent invalid memory operation.
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*/
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signal_barrier();
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}
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static inline void clear_helper_retaddr(void)
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{
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/*
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* Ensure that previous memory operations have succeeded before
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* removing the data visible to the signal handler.
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*/
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signal_barrier();
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helper_retaddr = 0;
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}
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/* In user-only mode we provide only the _code and _data accessors. */
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#define MEMSUFFIX _data
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_useronly_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_useronly_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_useronly_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_useronly_template.h"
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#undef MEMSUFFIX
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#define MEMSUFFIX _code
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#define CODE_ACCESS
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_useronly_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_useronly_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_useronly_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_useronly_template.h"
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#undef MEMSUFFIX
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#undef CODE_ACCESS
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#else
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/* The memory helpers for tcg-generated code need tcg_target_long etc. */
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#include "tcg.h"
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static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry)
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{
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#if TCG_OVERSIZED_GUEST
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return entry->addr_write;
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#else
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return atomic_read(&entry->addr_write);
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#endif
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}
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/* Find the TLB index corresponding to the mmu_idx + address pair. */
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static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx,
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target_ulong addr)
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{
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uintptr_t size_mask = env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
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return (addr >> TARGET_PAGE_BITS) & size_mask;
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}
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static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx)
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{
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return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1;
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}
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/* Find the TLB entry corresponding to the mmu_idx + address pair. */
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static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx,
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target_ulong addr)
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{
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return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)];
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}
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#ifdef MMU_MODE0_SUFFIX
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#define CPU_MMU_INDEX 0
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#define MEMSUFFIX MMU_MODE0_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif
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#if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX)
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#define CPU_MMU_INDEX 1
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#define MEMSUFFIX MMU_MODE1_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif
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#if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX)
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#define CPU_MMU_INDEX 2
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#define MEMSUFFIX MMU_MODE2_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 3) */
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#if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX)
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#define CPU_MMU_INDEX 3
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#define MEMSUFFIX MMU_MODE3_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 4) */
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#if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX)
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#define CPU_MMU_INDEX 4
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#define MEMSUFFIX MMU_MODE4_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 5) */
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#if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX)
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#define CPU_MMU_INDEX 5
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#define MEMSUFFIX MMU_MODE5_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 6) */
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#if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX)
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#define CPU_MMU_INDEX 6
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#define MEMSUFFIX MMU_MODE6_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 7) */
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#if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX)
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#define CPU_MMU_INDEX 7
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#define MEMSUFFIX MMU_MODE7_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 8) */
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#if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX)
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#define CPU_MMU_INDEX 8
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#define MEMSUFFIX MMU_MODE8_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 9) */
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#if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX)
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#define CPU_MMU_INDEX 9
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#define MEMSUFFIX MMU_MODE9_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 10) */
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#if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX)
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#define CPU_MMU_INDEX 10
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#define MEMSUFFIX MMU_MODE10_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 11) */
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#if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX)
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#define CPU_MMU_INDEX 11
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#define MEMSUFFIX MMU_MODE11_SUFFIX
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* (NB_MMU_MODES >= 12) */
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#if (NB_MMU_MODES > 12)
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#error "NB_MMU_MODES > 12 is not supported for now"
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#endif /* (NB_MMU_MODES > 12) */
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/* these access are slower, they must be as rare as possible */
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#define CPU_MMU_INDEX (cpu_mmu_index(env, false))
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#define MEMSUFFIX _data
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#define CPU_MMU_INDEX (cpu_mmu_index(env, true))
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#define MEMSUFFIX _code
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#define SOFTMMU_CODE_ACCESS
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#undef SOFTMMU_CODE_ACCESS
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#endif /* defined(CONFIG_USER_ONLY) */
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/**
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* tlb_vaddr_to_host:
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* @env: CPUArchState
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* @addr: guest virtual address to look up
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* @access_type: 0 for read, 1 for write, 2 for execute
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* @mmu_idx: MMU index to use for lookup
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*
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* Look up the specified guest virtual index in the TCG softmmu TLB.
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* If we can translate a host virtual address suitable for direct RAM
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* access, without causing a guest exception, then return it.
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* Otherwise (TLB entry is for an I/O access, guest software
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* TLB fill required, etc) return NULL.
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*/
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#ifdef CONFIG_USER_ONLY
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static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
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MMUAccessType access_type, int mmu_idx)
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{
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return g2h(addr);
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}
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#else
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void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
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MMUAccessType access_type, int mmu_idx);
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#endif
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#endif /* CPU_LDST_H */
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