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			TWI_CNTR_INT_FLAG is W1C(write 1 to clear and write 0 has non-effect) register on SUN6i based SoCs, we should lower interrupt when the guest set this bit. The linux kernel will hang in irq handler(mv64xxx_i2c_intr) if no device connected on the i2c bus, next is the trace log: allwinner_i2c_write write CNTR(0x0c): 0xc4 A_ACK BUS_EN INT_EN allwinner_i2c_write write CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read STAT(0x10): 0x20 STAT_M_ADDR_WR_NACK allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE ... Fix it. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Tested-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			62 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  Allwinner I2C Bus Serial Interface registers definition
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|  *
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|  *  Copyright (C) 2022 Strahinja Jankovic. <strahinja.p.jankovic@gmail.com>
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|  *
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|  *  This file is derived from IMX I2C controller,
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|  *  by Jean-Christophe DUBOIS .
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|  *
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|  *  This program is free software; you can redistribute it and/or modify it
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|  *  under the terms of the GNU General Public License as published by the
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|  *  Free Software Foundation; either version 2 of the License, or
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|  *  (at your option) any later version.
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|  *
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|  *  This program is distributed in the hope that it will be useful, but WITHOUT
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|  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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|  *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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|  *  for more details.
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|  *
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|  *  You should have received a copy of the GNU General Public License along
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|  *  with this program; if not, see <http://www.gnu.org/licenses/>.
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|  *
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|  */
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| 
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| #ifndef ALLWINNER_I2C_H
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| #define ALLWINNER_I2C_H
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| 
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| #include "hw/sysbus.h"
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| #include "qom/object.h"
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| 
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| #define TYPE_AW_I2C "allwinner.i2c"
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| 
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| /** Allwinner I2C sun6i family and newer (A31, H2+, H3, etc) */
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| #define TYPE_AW_I2C_SUN6I    TYPE_AW_I2C "-sun6i"
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| 
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| OBJECT_DECLARE_SIMPLE_TYPE(AWI2CState, AW_I2C)
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| 
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| #define AW_I2C_MEM_SIZE         0x24
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| 
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| struct AWI2CState {
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|     /*< private >*/
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|     SysBusDevice parent_obj;
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| 
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|     /*< public >*/
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|     MemoryRegion iomem;
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|     I2CBus *bus;
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|     qemu_irq irq;
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| 
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|     uint8_t addr;
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|     uint8_t xaddr;
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|     uint8_t data;
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|     uint8_t cntr;
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|     uint8_t stat;
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|     uint8_t ccr;
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|     uint8_t srst;
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|     uint8_t efr;
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|     uint8_t lcr;
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| 
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|     bool irq_clear_inverted;
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| };
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| 
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| #endif /* ALLWINNER_I2C_H */
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