20936684b6
Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240109194438.70934-2-ines.varhol@telecom-paris.fr Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
/*
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* STM32L4x5 SYSCFG (System Configuration Controller)
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*
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* Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
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* Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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* This work is based on the stm32f4xx_syscfg by Alistair Francis.
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* Original code is licensed under the MIT License:
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*/
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/*
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* The reference used is the STMicroElectronics RM0351 Reference manual
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* for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
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* https://www.st.com/en/microcontrollers-microprocessors/stm32l4x5/documentation.html
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*/
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#ifndef HW_STM32L4X5_SYSCFG_H
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#define HW_STM32L4X5_SYSCFG_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_STM32L4X5_SYSCFG "stm32l4x5-syscfg"
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OBJECT_DECLARE_SIMPLE_TYPE(Stm32l4x5SyscfgState, STM32L4X5_SYSCFG)
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#define NUM_GPIOS 8
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#define GPIO_NUM_PINS 16
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#define SYSCFG_NUM_EXTICR 4
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struct Stm32l4x5SyscfgState {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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uint32_t memrmp;
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uint32_t cfgr1;
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uint32_t exticr[SYSCFG_NUM_EXTICR];
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uint32_t scsr;
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uint32_t cfgr2;
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uint32_t swpr;
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uint32_t skr;
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uint32_t swpr2;
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qemu_irq gpio_out[GPIO_NUM_PINS];
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};
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#endif
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