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FRET-qemu/target/riscv/insn_trans
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Richard Henderson 451e4ffdb0 decodetree: Add DisasContext argument to !function expanders
This does require adjusting all existing users.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-06 11:18:34 -07:00
..
trans_privileged.inc.c
target/riscv: Convert RV priv insns to decodetree
2019-03-13 10:34:06 +01:00
trans_rva.inc.c
target/riscv: Convert RV64A insns to decodetree
2019-03-13 10:34:06 +01:00
trans_rvc.inc.c
decodetree: Add DisasContext argument to !function expanders
2019-05-06 11:18:34 -07:00
trans_rvd.inc.c
target/riscv: Convert RV64D insns to decodetree
2019-03-13 10:34:06 +01:00
trans_rvf.inc.c
target/riscv: Convert RV64F insns to decodetree
2019-03-13 10:34:06 +01:00
trans_rvi.inc.c
target/riscv: Rename trans_arith to gen_arith
2019-03-13 10:40:50 +01:00
trans_rvm.inc.c
target/riscv: Zero extend the inputs of divuw and remuw
2019-03-22 00:26:39 -07:00
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