 774204cf98
			
		
	
	
		774204cf98
		
	
	
	
	
		
			
			This commit adds support for x2APIC transitions when writing to MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to TCG_EXT_FEATURES. The set_base in APICCommonClass now returns an integer to indicate error in execution. apic_set_base return -1 on invalid APIC state transition, accelerator can use this to raise appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
		
			
				
	
	
		
			105 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			105 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Xen basic APIC support
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|  *
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|  * Copyright (c) 2012 Citrix
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|  *
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|  * Authors:
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|  *  Wei Liu <wei.liu2@citrix.com>
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|  *
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|  * This work is licensed under the terms of the GNU GPL version 2 or
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|  * later. See the COPYING file in the top-level directory.
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "hw/i386/apic_internal.h"
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| #include "hw/pci/msi.h"
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| #include "hw/xen/xen.h"
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| #include "qemu/module.h"
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| 
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| static uint64_t xen_apic_mem_read(void *opaque, hwaddr addr,
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|                                   unsigned size)
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| {
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|     return ~(uint64_t)0;
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| }
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| 
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| static void xen_apic_mem_write(void *opaque, hwaddr addr,
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|                                uint64_t data, unsigned size)
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| {
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|     if (size != sizeof(uint32_t)) {
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|         fprintf(stderr, "Xen: APIC write data size = %d, invalid\n", size);
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|         return;
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|     }
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| 
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|     xen_hvm_inject_msi(addr, data);
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| }
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| 
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| static const MemoryRegionOps xen_apic_io_ops = {
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|     .read = xen_apic_mem_read,
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|     .write = xen_apic_mem_write,
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|     .endianness = DEVICE_NATIVE_ENDIAN,
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| };
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| 
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| static void xen_apic_realize(DeviceState *dev, Error **errp)
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| {
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|     APICCommonState *s = APIC_COMMON(dev);
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| 
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|     s->vapic_control = 0;
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|     memory_region_init_io(&s->io_memory, OBJECT(s), &xen_apic_io_ops, s,
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|                           "xen-apic-msi", APIC_SPACE_SIZE);
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|     msi_nonbroken = true;
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| }
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| 
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| static int xen_apic_set_base(APICCommonState *s, uint64_t val)
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| {
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|     return 0;
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| }
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| 
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| static void xen_apic_set_tpr(APICCommonState *s, uint8_t val)
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| {
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| }
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| 
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| static uint8_t xen_apic_get_tpr(APICCommonState *s)
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| {
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|     return 0;
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| }
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| 
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| static void xen_apic_vapic_base_update(APICCommonState *s)
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| {
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| }
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| 
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| static void xen_apic_external_nmi(APICCommonState *s)
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| {
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| }
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| 
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| static void xen_send_msi(MSIMessage *msi)
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| {
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|     xen_hvm_inject_msi(msi->address, msi->data);
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| }
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| 
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| static void xen_apic_class_init(ObjectClass *klass, void *data)
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| {
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|     APICCommonClass *k = APIC_COMMON_CLASS(klass);
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| 
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|     k->realize = xen_apic_realize;
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|     k->set_base = xen_apic_set_base;
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|     k->set_tpr = xen_apic_set_tpr;
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|     k->get_tpr = xen_apic_get_tpr;
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|     k->vapic_base_update = xen_apic_vapic_base_update;
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|     k->external_nmi = xen_apic_external_nmi;
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|     k->send_msi = xen_send_msi;
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| }
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| 
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| static const TypeInfo xen_apic_info = {
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|     .name = "xen-apic",
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|     .parent = TYPE_APIC_COMMON,
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|     .instance_size = sizeof(APICCommonState),
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|     .class_init = xen_apic_class_init,
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| };
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| 
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| static void xen_apic_register_types(void)
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| {
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|     type_register_static(&xen_apic_info);
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| }
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| 
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| type_init(xen_apic_register_types)
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