2af71d28e7
Add watchdog timer support to Allwinner-H40 and Bananapi. The watchdog timer is added as an overlay to the Timer module memory map. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Message-id: 20240115182757.1095012-4-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
158 lines
4.2 KiB
C
158 lines
4.2 KiB
C
/*
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* Allwinner R40/A40i/T3 System on Chip emulation
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*
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* Copyright (C) 2023 qianfan Zhao <qianfanguijin@163.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_ARM_ALLWINNER_R40_H
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#define HW_ARM_ALLWINNER_R40_H
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#include "qom/object.h"
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#include "hw/timer/allwinner-a10-pit.h"
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#include "hw/ide/ahci.h"
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#include "hw/intc/arm_gic.h"
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#include "hw/sd/allwinner-sdhost.h"
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#include "hw/misc/allwinner-r40-ccu.h"
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#include "hw/misc/allwinner-r40-dramc.h"
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#include "hw/misc/allwinner-sramc.h"
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#include "hw/i2c/allwinner-i2c.h"
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#include "hw/net/allwinner_emac.h"
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#include "hw/net/allwinner-sun8i-emac.h"
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#include "hw/usb/hcd-ohci.h"
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#include "hw/usb/hcd-ehci.h"
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#include "hw/watchdog/allwinner-wdt.h"
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#include "target/arm/cpu.h"
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#include "sysemu/block-backend.h"
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enum {
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AW_R40_DEV_SRAM_A1,
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AW_R40_DEV_SRAM_A2,
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AW_R40_DEV_SRAM_A3,
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AW_R40_DEV_SRAM_A4,
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AW_R40_DEV_SRAMC,
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AW_R40_DEV_EMAC,
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AW_R40_DEV_MMC0,
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AW_R40_DEV_MMC1,
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AW_R40_DEV_MMC2,
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AW_R40_DEV_MMC3,
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AW_R40_DEV_AHCI,
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AW_R40_DEV_EHCI1,
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AW_R40_DEV_OHCI1,
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AW_R40_DEV_EHCI2,
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AW_R40_DEV_OHCI2,
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AW_R40_DEV_CCU,
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AW_R40_DEV_PIT,
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AW_R40_DEV_WDT,
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AW_R40_DEV_UART0,
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AW_R40_DEV_UART1,
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AW_R40_DEV_UART2,
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AW_R40_DEV_UART3,
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AW_R40_DEV_UART4,
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AW_R40_DEV_UART5,
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AW_R40_DEV_UART6,
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AW_R40_DEV_UART7,
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AW_R40_DEV_TWI0,
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AW_R40_DEV_GMAC,
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AW_R40_DEV_GIC_DIST,
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AW_R40_DEV_GIC_CPU,
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AW_R40_DEV_GIC_HYP,
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AW_R40_DEV_GIC_VCPU,
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AW_R40_DEV_SDRAM,
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AW_R40_DEV_DRAMCOM,
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AW_R40_DEV_DRAMCTL,
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AW_R40_DEV_DRAMPHY,
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};
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#define AW_R40_NUM_CPUS (4)
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/**
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* Allwinner R40 object model
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* @{
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*/
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/** Object type for the Allwinner R40 SoC */
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#define TYPE_AW_R40 "allwinner-r40"
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/** Convert input object to Allwinner R40 state object */
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OBJECT_DECLARE_SIMPLE_TYPE(AwR40State, AW_R40)
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/** @} */
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/**
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* Allwinner R40 object
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*
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* This struct contains the state of all the devices
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* which are currently emulated by the R40 SoC code.
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*/
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#define AW_R40_NUM_MMCS 4
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#define AW_R40_NUM_USB 2
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#define AW_R40_NUM_UARTS 8
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struct AwR40State {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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/** Physical base address for start of RAM */
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hwaddr ram_addr;
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/** Total RAM size in megabytes */
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uint32_t ram_size;
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ARMCPU cpus[AW_R40_NUM_CPUS];
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const hwaddr *memmap;
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AwSRAMCState sramc;
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AwA10PITState timer;
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AwWdtState wdt;
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AllwinnerAHCIState sata;
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AwSdHostState mmc[AW_R40_NUM_MMCS];
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EHCISysBusState ehci[AW_R40_NUM_USB];
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OHCISysBusState ohci[AW_R40_NUM_USB];
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AwR40ClockCtlState ccu;
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AwR40DramCtlState dramc;
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AWI2CState i2c0;
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AwEmacState emac;
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AwSun8iEmacState gmac;
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GICState gic;
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MemoryRegion sram_a1;
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MemoryRegion sram_a2;
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MemoryRegion sram_a3;
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MemoryRegion sram_a4;
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};
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/**
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* Emulate Boot ROM firmware setup functionality.
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*
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* A real Allwinner R40 SoC contains a Boot ROM
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* which is the first code that runs right after
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* the SoC is powered on. The Boot ROM is responsible
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* for loading user code (e.g. a bootloader) from any
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* of the supported external devices and writing the
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* downloaded code to internal SRAM. After loading the SoC
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* begins executing the code written to SRAM.
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*
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* This function emulates the Boot ROM by copying 32 KiB
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* of data from the given block device and writes it to
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* the start of the first internal SRAM memory.
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*
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* @s: Allwinner R40 state object pointer
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* @blk: Block backend device object pointer
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* @unit: the mmc control's unit
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*/
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bool allwinner_r40_bootrom_setup(AwR40State *s, BlockBackend *blk, int unit);
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#endif /* HW_ARM_ALLWINNER_R40_H */
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