4a58330343
CXL switch CCIs were added in CXL r3.0. They are a PCI function, identified by class code that provides a CXL mailbox (identical to that previously defined for CXL type 3 memory devices) over which various FM-API commands may be used. Whilst the intent of this feature is enable switch control from a BMC attached to a switch upstream port, it is also useful to allow emulation of this feature on the upstream port connected to a host using the CXL devices as this greatly simplifies testing. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
20 lines
348 B
C
20 lines
348 B
C
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#ifndef CXL_USP_H
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#define CXL_USP_H
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#include "hw/pci/pcie.h"
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#include "hw/pci/pcie_port.h"
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#include "hw/cxl/cxl.h"
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typedef struct CXLUpstreamPort {
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/*< private >*/
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PCIEPort parent_obj;
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/*< public >*/
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CXLComponentState cxl_cstate;
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CXLCCI swcci;
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DOECap doe_cdat;
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uint64_t sn;
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} CXLUpstreamPort;
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#endif /* CXL_SUP_H */
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