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			When you run QEMU with an Aspeed machine and a single serial device
using stdio like this:
    qemu -machine ast2600-evb -drive ... -serial stdio
The guest OS can read and write to the UART5 registers at 0x1E784000 and
it will receive from stdin and write to stdout. The Aspeed SoC's have a
lot more UART's though (AST2500 has 5, AST2600 has 13) and depending on
the board design, may be using any of them as the serial console. (See
"stdout-path" in a DTS to check which one is chosen).
Most boards, including all of those currently defined in
hw/arm/aspeed.c, just use UART5, but some use UART1. This change adds
some flexibility for different boards without requiring users to change
their command-line invocation of QEMU.
I tested this doesn't break existing code by booting an AST2500 OpenBMC
image and an AST2600 OpenBMC image, each using UART5 as the console.
Then I tested switching the default to UART1 and booting an AST2600
OpenBMC image that uses UART1, and that worked too.
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210901153615.2746885-2-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
		
	
			
		
			
				
	
	
		
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			46 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Aspeed Machines
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|  *
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|  * Copyright 2018 IBM Corp.
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|  *
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|  * This code is licensed under the GPL version 2 or later.  See
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|  * the COPYING file in the top-level directory.
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|  */
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| #ifndef ARM_ASPEED_H
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| #define ARM_ASPEED_H
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| 
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| #include "hw/boards.h"
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| #include "qom/object.h"
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| 
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| typedef struct AspeedMachineState AspeedMachineState;
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| 
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| #define TYPE_ASPEED_MACHINE       MACHINE_TYPE_NAME("aspeed")
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| typedef struct AspeedMachineClass AspeedMachineClass;
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| DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
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|                      ASPEED_MACHINE, TYPE_ASPEED_MACHINE)
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| 
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| #define ASPEED_MAC0_ON   (1 << 0)
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| #define ASPEED_MAC1_ON   (1 << 1)
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| #define ASPEED_MAC2_ON   (1 << 2)
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| #define ASPEED_MAC3_ON   (1 << 3)
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| 
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| 
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| struct AspeedMachineClass {
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|     MachineClass parent_obj;
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| 
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|     const char *name;
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|     const char *desc;
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|     const char *soc_name;
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|     uint32_t hw_strap1;
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|     uint32_t hw_strap2;
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|     const char *fmc_model;
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|     const char *spi_model;
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|     uint32_t num_cs;
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|     uint32_t macs_mask;
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|     void (*i2c_init)(AspeedMachineState *bmc);
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|     uint32_t uart_default;
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| };
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| 
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| 
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| #endif
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