 c3931ee8b4
			
		
	
	
		c3931ee8b4
		
	
	
	
	
		
			
			Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1387159292-10436-4-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			41 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			41 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef AW_A10_PIC_H
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| #define AW_A10_PIC_H
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| 
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| #define TYPE_AW_A10_PIC  "allwinner-a10-pic"
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| #define AW_A10_PIC(obj) OBJECT_CHECK(AwA10PICState, (obj), TYPE_AW_A10_PIC)
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| 
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| #define AW_A10_PIC_VECTOR       0
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| #define AW_A10_PIC_BASE_ADDR    4
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| #define AW_A10_PIC_PROTECT      8
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| #define AW_A10_PIC_NMI          0xc
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| #define AW_A10_PIC_IRQ_PENDING  0x10
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| #define AW_A10_PIC_FIQ_PENDING  0x20
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| #define AW_A10_PIC_SELECT       0x30
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| #define AW_A10_PIC_ENABLE       0x40
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| #define AW_A10_PIC_MASK         0x50
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| 
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| #define AW_A10_PIC_INT_NR       95
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| #define AW_A10_PIC_REG_NUM      DIV_ROUND_UP(AW_A10_PIC_INT_NR, 32)
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| 
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| typedef struct AwA10PICState {
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|     /*< private >*/
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|     SysBusDevice parent_obj;
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|     /*< public >*/
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|     MemoryRegion iomem;
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|     qemu_irq parent_fiq;
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|     qemu_irq parent_irq;
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| 
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|     uint32_t vector;
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|     uint32_t base_addr;
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|     uint32_t protect;
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|     uint32_t nmi;
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|     uint32_t irq_pending[AW_A10_PIC_REG_NUM];
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|     uint32_t fiq_pending[AW_A10_PIC_REG_NUM];
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|     uint32_t select[AW_A10_PIC_REG_NUM];
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|     uint32_t enable[AW_A10_PIC_REG_NUM];
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|     uint32_t mask[AW_A10_PIC_REG_NUM];
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|     /*priority setting here*/
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| } AwA10PICState;
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| 
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| #endif
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