Add a base class that is common to virtio-gpu and vhost-user-gpu devices. The VirtIOGPUBase base class provides common functionalities necessary for both virtio-gpu and vhost-user-gpu: - common configuration (max-outputs, initial resolution, flags) - virtio device initialization, including queue setup - device pre-conditions checks (iommu) - migration blocker - virtio device callbacks - hooking up to qemu display subsystem - a few common helper functions to reset the device, retrieve display informations - a class callback to unblock the rendering (for GL updates) What is left to the virtio-gpu subdevice to take care of, in short, are all the virtio queues handling, command processing and migration. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20190524130946.31736-8-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
		
			
				
	
	
		
			269 lines
		
	
	
		
			7.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			269 lines
		
	
	
		
			7.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Virtio GPU Device
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 *
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 * Copyright Red Hat, Inc. 2013-2014
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 *
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 * Authors:
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 *     Dave Airlie <airlied@redhat.com>
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 *     Gerd Hoffmann <kraxel@redhat.com>
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 *
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 * This work is licensed under the terms of the GNU GPL, version 2 or later.
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 * See the COPYING file in the top-level directory.
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 */
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#include "qemu/osdep.h"
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#include "hw/virtio/virtio-gpu.h"
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#include "migration/blocker.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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void
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virtio_gpu_base_reset(VirtIOGPUBase *g)
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{
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    int i;
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    g->enable = 0;
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    g->use_virgl_renderer = false;
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    for (i = 0; i < g->conf.max_outputs; i++) {
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        g->scanout[i].resource_id = 0;
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        g->scanout[i].width = 0;
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        g->scanout[i].height = 0;
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        g->scanout[i].x = 0;
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        g->scanout[i].y = 0;
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        g->scanout[i].ds = NULL;
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    }
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}
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void
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virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
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                                  struct virtio_gpu_resp_display_info *dpy_info)
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{
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    int i;
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    for (i = 0; i < g->conf.max_outputs; i++) {
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        if (g->enabled_output_bitmask & (1 << i)) {
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            dpy_info->pmodes[i].enabled = 1;
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            dpy_info->pmodes[i].r.width = cpu_to_le32(g->req_state[i].width);
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            dpy_info->pmodes[i].r.height = cpu_to_le32(g->req_state[i].height);
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        }
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    }
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}
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static void virtio_gpu_invalidate_display(void *opaque)
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{
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}
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static void virtio_gpu_update_display(void *opaque)
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{
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}
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static void virtio_gpu_text_update(void *opaque, console_ch_t *chardata)
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{
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}
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static void virtio_gpu_notify_event(VirtIOGPUBase *g, uint32_t event_type)
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{
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    g->virtio_config.events_read |= event_type;
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    virtio_notify_config(&g->parent_obj);
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}
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static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
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{
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    VirtIOGPUBase *g = opaque;
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    if (idx >= g->conf.max_outputs) {
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        return -1;
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    }
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    g->req_state[idx].x = info->xoff;
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    g->req_state[idx].y = info->yoff;
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    g->req_state[idx].width = info->width;
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    g->req_state[idx].height = info->height;
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    if (info->width && info->height) {
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        g->enabled_output_bitmask |= (1 << idx);
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    } else {
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        g->enabled_output_bitmask &= ~(1 << idx);
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    }
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    /* send event to guest */
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    virtio_gpu_notify_event(g, VIRTIO_GPU_EVENT_DISPLAY);
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    return 0;
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}
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static void
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virtio_gpu_gl_block(void *opaque, bool block)
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{
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    VirtIOGPUBase *g = opaque;
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    VirtIOGPUBaseClass *vgc = VIRTIO_GPU_BASE_GET_CLASS(g);
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    if (block) {
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        g->renderer_blocked++;
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    } else {
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        g->renderer_blocked--;
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    }
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    assert(g->renderer_blocked >= 0);
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    if (g->renderer_blocked == 0) {
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        vgc->gl_unblock(g);
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    }
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}
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const GraphicHwOps virtio_gpu_ops = {
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    .invalidate = virtio_gpu_invalidate_display,
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    .gfx_update = virtio_gpu_update_display,
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    .text_update = virtio_gpu_text_update,
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    .ui_info = virtio_gpu_ui_info,
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    .gl_block = virtio_gpu_gl_block,
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};
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bool
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virtio_gpu_base_device_realize(DeviceState *qdev,
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                               VirtIOHandleOutput ctrl_cb,
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                               VirtIOHandleOutput cursor_cb,
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                               Error **errp)
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{
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    VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
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    VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev);
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    Error *local_err = NULL;
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    int i;
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    if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
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        error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
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        return false;
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    }
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    g->use_virgl_renderer = false;
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    if (virtio_gpu_virgl_enabled(g->conf)) {
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        error_setg(&g->migration_blocker, "virgl is not yet migratable");
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        migrate_add_blocker(g->migration_blocker, &local_err);
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        if (local_err) {
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            error_propagate(errp, local_err);
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            error_free(g->migration_blocker);
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            return false;
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        }
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    }
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    g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);
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    virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,
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                sizeof(struct virtio_gpu_config));
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    if (virtio_gpu_virgl_enabled(g->conf)) {
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        /* use larger control queue in 3d mode */
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        virtio_add_queue(vdev, 256, ctrl_cb);
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        virtio_add_queue(vdev, 16, cursor_cb);
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    } else {
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        virtio_add_queue(vdev, 64, ctrl_cb);
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        virtio_add_queue(vdev, 16, cursor_cb);
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    }
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    g->enabled_output_bitmask = 1;
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    g->req_state[0].width = g->conf.xres;
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    g->req_state[0].height = g->conf.yres;
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    for (i = 0; i < g->conf.max_outputs; i++) {
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        g->scanout[i].con =
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            graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g);
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        if (i > 0) {
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            dpy_gfx_replace_surface(g->scanout[i].con, NULL);
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        }
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    }
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    return true;
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}
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static uint64_t
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virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features,
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                             Error **errp)
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{
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    VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
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    if (virtio_gpu_virgl_enabled(g->conf)) {
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        features |= (1 << VIRTIO_GPU_F_VIRGL);
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    }
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    if (virtio_gpu_edid_enabled(g->conf)) {
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        features |= (1 << VIRTIO_GPU_F_EDID);
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    }
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    return features;
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}
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static void
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virtio_gpu_base_set_features(VirtIODevice *vdev, uint64_t features)
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{
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    static const uint32_t virgl = (1 << VIRTIO_GPU_F_VIRGL);
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    VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
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    g->use_virgl_renderer = ((features & virgl) == virgl);
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    trace_virtio_gpu_features(g->use_virgl_renderer);
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}
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static void
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virtio_gpu_base_device_unrealize(DeviceState *qdev, Error **errp)
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{
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    VirtIOGPUBase *g = VIRTIO_GPU_BASE(qdev);
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    if (g->migration_blocker) {
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        migrate_del_blocker(g->migration_blocker);
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        error_free(g->migration_blocker);
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    }
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}
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static void
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virtio_gpu_base_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
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    vdc->unrealize = virtio_gpu_base_device_unrealize;
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    vdc->get_features = virtio_gpu_base_get_features;
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    vdc->set_features = virtio_gpu_base_set_features;
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    set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
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    dc->hotpluggable = false;
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}
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static const TypeInfo virtio_gpu_base_info = {
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    .name = TYPE_VIRTIO_GPU_BASE,
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    .parent = TYPE_VIRTIO_DEVICE,
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    .instance_size = sizeof(VirtIOGPUBase),
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    .class_size = sizeof(VirtIOGPUBaseClass),
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    .class_init = virtio_gpu_base_class_init,
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    .abstract = true
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};
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static void
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virtio_register_types(void)
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{
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    type_register_static(&virtio_gpu_base_info);
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}
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type_init(virtio_register_types)
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr)                != 24);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor)           != 56);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_unref)          != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_2d)      != 40);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_set_scanout)             != 48);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_flush)          != 48);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_to_host_2d)     != 56);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_mem_entry)               != 16);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_attach_backing) != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_detach_backing) != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_display_info)       != 408);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_host_3d)        != 72);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_3d)      != 72);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_create)              != 96);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_destroy)             != 24);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_resource)            != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_cmd_submit)              != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset_info)         != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset_info)        != 40);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset)              != 32);
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QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset)             != 24);
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