8c89395eebUse a valid PRid.
ths
2007-11-18 03:19:58 +00:00
7317b8cad7Fix a && -> & typo. Catch wrong/unknown NOR flash command sequences, by Thorsten Zitterell.
balrog
2007-11-18 02:09:36 +00:00
9596ebb701Add statics and missing #includes for prototypes.
pbrook
2007-11-18 01:44:38 +00:00
4c1b1bfe30Improve PowerPC instructions set dump. Remove meaningless define from cpu.h Misc cleanups.
j_mayer
2007-11-17 23:14:53 +00:00
80d11f4467Add definitions for Freescale PowerPC implementations, ie MPC5xx, MPC8xx, e200, e300, e500 and e600 cores. Make those CPUs and PowerPC 440 available for user-mode emulation, thus providing a way of testing their implementation specific instructions.
j_mayer
2007-11-17 23:02:20 +00:00
b4095fed95Define Freescale cores specific MMU model, exceptions and input bus. (but do not provide any actual implementation).
j_mayer
2007-11-17 22:42:36 +00:00
05332d70fdA little more granularity in PowerPC instructions definition is needed in order to implement Freescale cores. Fix efsadd / efssub opcodes.
j_mayer
2007-11-17 22:26:51 +00:00
a4f30719a8PowerPC hypervisor mode is not fundamentally available only for PowerPC 64. Remove TARGET_PPC64 dependency and add code provision to be able to define a fake 32 bits CPU with hypervisor feature support.
j_mayer
2007-11-17 21:14:09 +00:00
9a87ce9b95Name the magic constants, fix a hex number without 0x
blueswir1
2007-11-17 21:01:04 +00:00
e1dad5a615Better STOPINTR bit semantics in the PXA2xx DMA. Don't error out on reading GPCR register, just warn (Thorsten Zitterell). Don't zero a memory that's already zeroed.
balrog
2007-11-17 18:43:47 +00:00
749bc4bf0bRemove stray uses of vl.h.
pbrook
2007-11-17 17:35:54 +00:00
87ecb68bdfBreak up vl.h.
pbrook
2007-11-17 17:14:51 +00:00
02ce600c1eConvert SD cards code to use qemu_irq too.
balrog
2007-11-17 14:34:44 +00:00
38641a52f2Convert PXA2xx GPIOs and SCOOP GPIOs to a qemu_irq based api (similar to omap, max7310 and s3c gpios). Convert spitz and gumstix boards to use new api. Remove now obsolete gpio_handler_t definition.
balrog
2007-11-17 14:07:13 +00:00
6c41b2723fDon't compare '\0' against pointers. Add a note from Fabrice in slow_st template.
balrog
2007-11-17 12:12:29 +00:00
f610349f36Fix collision in PowerPC instructions definitions.
j_mayer
2007-11-17 12:01:45 +00:00
05ee37ebf6Gumstix 'connex' board support by Thorsten Zitterell.
balrog
2007-11-17 11:50:55 +00:00
7f1559c644Show usage and abort if an unknown option is passed to configure (Carlo Marcelo Arenas Belon).
balrog
2007-11-17 10:24:32 +00:00
7221fa98d3Check permissions for the last byte first in unaligned slow_st accesses (patch from TeLeMan).
balrog
2007-11-17 09:53:42 +00:00
7fbfb139ecMachine specific IOMMU version (Robert Reif)
blueswir1
2007-11-17 09:04:09 +00:00
7820dbf3f0Make the PowerPC MMU model, exception model and input bus model typedefed enums.
j_mayer
2007-11-17 02:16:14 +00:00
7b62a95504Add missing definition for number of input pins for the PowerPC 970 bus. Use proper INPUT_NB definitions to allocate PowerPC input pins structure, fixing a buffer overflow in the 6xx bus case.
j_mayer
2007-11-17 02:04:00 +00:00
5e692ecdbfRemove ppc64h CPUs definitions from the configure script.
j_mayer
2007-11-17 01:54:45 +00:00
31fca6ab60Resynchronize darwin-user target with linux-user: add CPU selection feature, choose the correct default CPU and set the 32/64 bits computation mode properly.
j_mayer
2007-11-17 01:52:38 +00:00
b172c56a6dAlways make all PowerPC exception definitions visible. Always make the hypervisor timers available. Remove all TARGET_PPC64H checks, keeping a few if (0) tests for cases that cannot be properly handled with the current PowerPC CPU definition.
j_mayer
2007-11-17 01:37:44 +00:00
5a6932d51dFix NaN handling for MIPS and HPPA.
ths
2007-11-16 14:57:36 +00:00
7863667f35Always make PowerPC hypervisor mode memory accesses and instructions available for full system emulation, then removing all #if TARGET_PPC64H from micro-ops and code translator. Add new macros to dramatically simplify memory access tables definitions in target-ppc/translate.c.
j_mayer
2007-11-16 14:11:28 +00:00
2f6196984bsuppressed tgetx and tputx (initial patch by Thayne Harbaugh)
bellard
2007-11-16 10:46:05 +00:00
67276f53dcInit dumb display if no others available.
pbrook
2007-11-15 19:04:08 +00:00
7ded4f523aforce correct ppc64 cpu
bellard
2007-11-15 15:37:50 +00:00
6376fa993cUpdate OpenBIOS image to SVN revision 176. Changes: r172: Enable boot mode in the exception handler for both SuperSparc and TurboSparc r173: More CPU definitions r174: Add Sparc64 CPU identification r175: Add SPARCserver 600MP emulation r176: Update OHW interface to version 3.
blueswir1
2007-11-14 19:41:26 +00:00
d2c63fc185Update OHW interface to version 3. Use common ABI description file with OpenBIOS.
blueswir1
2007-11-14 19:35:16 +00:00
57c26279c7Fix PowerPC targets compilation on 32 bits hosts: now that the SPE extension is available for all targets, we always need to have some 64 bits temporary registers.
j_mayer
2007-11-14 18:45:52 +00:00
d2fd1af767x86_64 linux user emulation
bellard
2007-11-14 18:08:56 +00:00
6b23f77722printf format fix
bellard
2007-11-14 18:04:05 +00:00
8d18e89309i386 TLS support
bellard
2007-11-14 15:18:40 +00:00
4683b130e5always define TARGET_ABI32 if 32 bit user
bellard
2007-11-14 15:16:52 +00:00
3cd7d1ddbbAllow use of SPE extension by all PowerPC targets, adding gprh registers to store GPR MSBs when GPRs are 32 bits. Remove not-needed-anymore ppcemb-linux-user target. Keep ppcemb-softmmu target, which provides 1kB pages support and 36 bits physical address space.
j_mayer
2007-11-12 01:56:18 +00:00