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  • b227a8e9aa Properly implement non-execute bit on PowerPC segments and PTEs. Fix page protection bits for PowerPC 64 MMU. j_mayer 2007-10-14 10:21:20 +00:00
  • dbdd25065e Implement time-base start/stop helpers. Implement PowerPC 6xx time-base enable input pin. j_mayer 2007-10-14 09:35:30 +00:00
  • d68f13063b Merge PowerPC 620 input bus definitions with standard PowerPC 6xx. Avoid hardcoding PowerPC interrupts definitions to ease updates. j_mayer 2007-10-14 09:27:16 +00:00
  • a13d7523cb There is no need of a specific MMU model for PowerPC 601. j_mayer 2007-10-14 09:14:08 +00:00
  • eacc324914 Implement PowerPC 64 SLB invalidation helpers. j_mayer 2007-10-14 09:06:19 +00:00
  • a01d8cadad Fix memory corruption reported by Julian Seward (still more bugs to fix in PreP emulation). j_mayer 2007-10-14 08:52:44 +00:00
  • bb6f6792bf Allow Alpha target to use supervisor and executive mode micro-ops. j_mayer 2007-10-14 08:50:17 +00:00
  • e63ecc6f68 Do not allow PowerPC CPU restart after entering checkstop mode. j_mayer 2007-10-14 08:48:23 +00:00
  • 22f8a8b31c Provision for PowerPC 64 with hypervisor mode support - not enabled for now. For consistency, group all PowerPC targets. j_mayer 2007-10-14 08:38:29 +00:00
  • 1e42b8f06d Generate micro-ops for PowerPC hypervisor mode. j_mayer 2007-10-14 08:27:14 +00:00
  • b1806c9e67 Generate micro-ops for Alpha executive and supervisor modes. j_mayer 2007-10-14 08:18:12 +00:00
  • 6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. j_mayer 2007-10-14 07:07:08 +00:00
  • d0f48074db Update TODO. ths 2007-10-13 19:00:52 +00:00
  • 89fc88da4c Fix off-by-one in address check. ths 2007-10-13 17:29:09 +00:00
  • ea6fd42fa2 Static-ify function. ths 2007-10-13 14:00:23 +00:00
  • c732abe222 Unify '-cpu ?' option. j_mayer 2007-10-12 06:47:46 +00:00
  • 90251fb96e Fix taddcctv and tsubcctv (David Matthews) blueswir1 2007-10-10 19:11:54 +00:00
  • cb33da57aa Support for executing 32 bit SPARC32PLUS files for Sparc64 user emulator blueswir1 2007-10-09 16:34:29 +00:00
  • bf367b5409 Match values with the ones documented in the PIIX4 datasheet. ths 2007-10-09 11:41:47 +00:00
  • c6cda17aca getpriority() shouldn't use libc wrapper, by Thayne Harbaugh. ths 2007-10-09 03:42:34 +00:00
  • aa34373598 Use always_inline in the MIPS support where applicable. ths 2007-10-09 03:39:58 +00:00
  • 6dab28d5b5 Fix vmmouse for 64bit guest, by Dan Kenigsberg. ths 2007-10-09 03:19:01 +00:00
  • ab19cb4129 Delete file which should have been removed in the lst commit. ths 2007-10-09 03:17:28 +00:00
  • 4e9f853731 Fix [ls][wd][lr] instructions, by Aurelien Jarno. ths 2007-10-09 03:12:08 +00:00
  • 0e21e12bb3 Don't route PIC interrupts through the local APIC if the local APIC config says so. By Ari Kivity. ths 2007-10-09 03:08:56 +00:00
  • aacb758b65 Update .cvsignore. ths 2007-10-09 03:05:08 +00:00
  • 981623fee3 Mentione CRIS in Changelog. ths 2007-10-08 13:40:13 +00:00
  • e7daa60575 Add CRIS configuration bits, by Edgar E. Iglesias. ths 2007-10-08 13:38:27 +00:00
  • 48733d195b CRIS Linux userland emulation, part 2. By Edgar E. Iglesias. ths 2007-10-08 13:36:46 +00:00
  • e69b406510 CRIS Linux usermode emulation, part 1. By Edgar E. Iglesias. ths 2007-10-08 13:35:05 +00:00
  • dd43edf4e1 CRIS testsuite, based on the SIM testsuite, by Edgar E. Iglesias. ths 2007-10-08 13:32:20 +00:00
  • 83fa1010ae EtraxFS board support, by Edgar E. Iglesias. ths 2007-10-08 13:26:33 +00:00
  • f1ccf90477 CRIS support in toplevel, by Edgar E. Iglesias. ths 2007-10-08 13:16:14 +00:00
  • 94cff60a02 CRIS MMU emulation, by Edgar E. Iglesias. ths 2007-10-08 13:11:58 +00:00
  • 81fdc5f8d2 The remainder of CRIS CPU emulation files, by Edgar E. Iglesias. ths 2007-10-08 13:04:02 +00:00
  • 4fa551d768 CRIS micro-ops, by Edgar E. Iglesias. ths 2007-10-08 12:52:43 +00:00
  • 5478670f3d CRIS insn decoding macros, by Edgar E. Iglesias. ths 2007-10-08 12:50:59 +00:00
  • 8170028d75 CRIS instruction translation, by Edgar E. Iglesias. ths 2007-10-08 12:49:08 +00:00
  • a25fd137c3 Wire up CRIS disassembler, by Edgar E. Iglesias. ths 2007-10-08 12:46:58 +00:00
  • 450d4ff553 CRIS disassembler, originally from binutils, by Edgar E. Iglesias. ths 2007-10-08 12:45:38 +00:00
  • 9b22787cda Update PowerPC emulation status file. j_mayer 2007-10-08 03:00:35 +00:00
  • 25ba3a6812 Remove synonymous in PowerPC MSR bits definitions. Fix MSR EP bit buggy definition. Remove unuseful MSR flags. Fix MSR bits and flags definitions for most supported PowerPC implementations. Add MSR definitions/flags constistency checks and optional dump. j_mayer 2007-10-08 02:58:07 +00:00
  • 141c8ae225 Real-mode only PowerPC 40x do not have any TLBs. j_mayer 2007-10-08 02:44:11 +00:00
  • 4e80effcf9 Implement exception prefix feature for PowerPC 601. Fix PowerPC 601 hardware reset vector. j_mayer 2007-10-08 02:35:41 +00:00
  • 7a3a6927b6 Add missing exception vectors for PowerPC 7x5. j_mayer 2007-10-08 02:23:00 +00:00
  • 417bf01068 Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls). j_mayer 2007-10-07 23:10:08 +00:00
  • a9d9eb8fd4 Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy. j_mayer 2007-10-07 18:19:26 +00:00
  • b33c17e12d PowerPC target coding style fixes. j_mayer 2007-10-07 17:30:34 +00:00
  • b068d6a713 PowerPC target optimisations: make intensive use of always_inline. j_mayer 2007-10-07 17:13:44 +00:00
  • ed26abdbc1 Report missing elf_addr_t definition from Linux kernel header j_mayer 2007-10-07 16:07:25 +00:00
  • 3d17787055 Fix host and target longs confusions (continued). j_mayer 2007-10-07 16:06:13 +00:00
  • 863cf0b72c Fix confusions between host and target long types. Fix start_data computation. Fix auxiliary infos setup. j_mayer 2007-10-07 15:59:45 +00:00
  • f2e63a42c9 Reorganize the CPUPPCState structure to group features. Add #ifdef to avoid compiling not relevant resources: - MMU related stuff for user-mode only targets - PowerPC 64 only resources for PowerPC 32 targets - embedded PowerPC extensions for non-ppcemb targets. j_mayer 2007-10-07 15:43:50 +00:00
  • d26bfc9a1b Add MSR bits signification per PowerPC implementation flags (to be continued). As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. j_mayer 2007-10-07 14:41:00 +00:00
  • 7875ed20d7 Share devices that may be useful for all PowerPC 40x and 440 implementations. j_mayer 2007-10-07 14:25:11 +00:00
  • 008ff9d756 Share devices that might be useful for all PowerPC 40x & 440 implementations (mostly CPU registration and UIC, for now). j_mayer 2007-10-07 14:21:26 +00:00
  • 115646b648 More user timer fixes (Robert Reif) blueswir1 2007-10-07 10:00:55 +00:00
  • f930d07eda More detabification blueswir1 2007-10-06 11:28:21 +00:00
  • 81732d1926 Implement user mode for timers blueswir1 2007-10-06 11:25:43 +00:00
  • aa6ad6fee2 Support for loading a real BIOS image (Robert Reif) blueswir1 2007-10-06 11:24:18 +00:00
  • 12de9a396a Full implementation of PowerPC 64 MMU, just missing support for 1 TB memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. j_mayer 2007-10-05 22:06:02 +00:00
  • 5bfb56b264 Implement sparc64_[gs]et_context blueswir1 2007-10-05 17:01:51 +00:00
  • 65f9ee8d67 Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific. j_mayer 2007-10-05 13:11:25 +00:00
  • 1c27f8fbfe PowerPC hardware reset vector is now considered as part of the exception model. Use it at CPU initialisation time. j_mayer 2007-10-05 13:09:54 +00:00
  • 1192dad879 New '-bios' option, used to select an alternate BIOS image from bios_dir. j_mayer 2007-10-05 13:08:35 +00:00
  • e9c05b42e3 Implement PL110 byte order config bit (original patch by Richard Purdie). balrog 2007-10-04 23:45:31 +00:00
  • 4d043a0900 Quiet warnings introduced with the USB iso support. balrog 2007-10-04 22:55:53 +00:00
  • b9dc033c0d USB iso transfers support for the linux redirector and for UHCI, by Arnon Gilboa. balrog 2007-10-04 22:47:34 +00:00
  • 80f515e636 sh775x interrupt controller by Magnus Damm. balrog 2007-10-04 21:53:55 +00:00
  • 30d6eaca96 Remove redundant qemu_rearm_alarm_timer() in qemu_del_timer, patch by Dan Kenigsberg. balrog 2007-10-04 19:59:04 +00:00
  • 49a9b72568 (int64_t)UINT64_MAX is -1 and should not be assigned to nearest_delta_us, patch by Dan Kenigsberg. balrog 2007-10-04 19:47:09 +00:00
  • 2b76bdc965 Several corrections in the spitzkbd keymap (patch by Juergen Lock). Don't abort on illegal GPSR reads, instead only warn. balrog 2007-10-04 19:41:17 +00:00
  • 1cc8e6f067 We must reset the PowerPC CPU _after_ registering it, as hardware reset effect is implementation dependant. j_mayer 2007-10-04 01:54:44 +00:00
  • e57448f11c More cache tuning fixes: * fix the tunable cache line size probe for PowerPC 970. * initialize HID5 so cache line is 32 bytes long when running in user-mode only j_mayer 2007-10-04 01:50:03 +00:00
  • d63001d114 Make PowerPC cache line size implementation dependant. Implement dcbz tunable cache line size for PowerPC 970. Make hardware reset vector implementation dependant. j_mayer 2007-10-04 00:51:58 +00:00
  • 064034211a HID0 is a write-clear register on 970 (DBSR). j_mayer 2007-10-03 20:27:44 +00:00
  • 8f793433af Enable PowerPC 64 MMU model and exceptions. Cleanups in MMU exceptions generation. j_mayer 2007-10-03 20:19:40 +00:00
  • 0387d92875 Fix Sparc64 ldfa/stfa and float ops with fpr >= 32 blueswir1 2007-10-03 17:46:29 +00:00
  • fe33cc7103 Fix PowerPC initialisation and first reset: reset must occur after we defined the CPU features. j_mayer 2007-10-03 01:06:57 +00:00
  • 00af685fc9 We never have to export ppc_set_irq. Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) j_mayer 2007-10-03 01:05:39 +00:00
  • 217fae2d6b Fix PowerPC 405 BIOS instanciation: is a 32 bits only target. j_mayer 2007-10-03 01:04:20 +00:00
  • 0bd5f4ce3b Fix kernel loading blueswir1 2007-10-02 19:15:48 +00:00
  • 2857068eb1 Code provision for hypervisor mode memory accesses. Add comments in load & store tables to ease code reading. j_mayer 2007-10-02 10:11:50 +00:00
  • 2f4011767b Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulator on 32 bits hosts. j_mayer 2007-10-01 21:51:40 +00:00
  • a97fed52e5 Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.c j_mayer 2007-10-01 21:49:57 +00:00
  • 51996525c7 Fix block load ASIs blueswir1 2007-10-01 17:07:58 +00:00
  • 55aa45ddde Quickly hack PowerPC BIOS able to boot on CDROM again. j_mayer 2007-10-01 06:44:33 +00:00
  • 30032c940a Fix missing nip updates for instructions that potentially generate exceptions from op helpers. j_mayer 2007-10-01 05:22:17 +00:00
  • 7dbe11acd8 Handle all MMU models in switches, even if it's just to abort because of lack of supporting code. Implement 74xx software TLB model. Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss on those processors. j_mayer 2007-10-01 05:16:57 +00:00
  • 578bb25230 More comments about unimplemented SPRs. Tag unused functions with unused attribute instead of using #ifdef (TODO) to ease tests: just have to enable the implementation in the cpu_defs table. j_mayer 2007-10-01 04:48:45 +00:00
  • 056b05f8d2 Optimisations: avoid generation of duplicated micro-ops. j_mayer 2007-10-01 03:03:51 +00:00
  • b48d7d697f Compilation fix (forgotten patch). j_mayer 2007-10-01 02:55:07 +00:00
  • 5356c7b5a6 Remove definitions for deprecated SLB & TLB related op helpers. j_mayer 2007-10-01 01:59:12 +00:00
  • daf4f96ece Avoid op helpers that would just call helpers for TLB & SLB management: call the helpers directly from the micro-ops. Avoid duplicated code for tlbsx. implementation. j_mayer 2007-10-01 01:51:12 +00:00
  • 035feb8857 Share more SPR instanciations between all PowerPC 401 incarnations. Add comments about some unimplemented storage control dedicated SPRs. j_mayer 2007-10-01 01:38:03 +00:00
  • 6f5d427d58 Implement embedded PowerPC exceptions prefix and vectors registers. j_mayer 2007-10-01 01:32:49 +00:00
  • 4e290a0b71 Share input pins and internal interrupt controller between all PowerPC 40x. Fix critical input interrupt generation. j_mayer 2007-10-01 01:27:10 +00:00
  • 3391c81801 Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions blueswir1 2007-09-30 19:38:12 +00:00
  • ee0b03fd85 Fix Sparc64 wrasr instructions blueswir1 2007-09-30 16:37:00 +00:00
  • a902d88664 Fix (once again) PowerPC sync weight field. j_mayer 2007-09-30 15:21:15 +00:00