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• 5c8cdbf833 TCX palette bug fix blueswir1 2007-04-17 19:42:21 +00:00
• 18c6e2ff5a Fix mmapped register alignment and endianness handling. ths 2007-04-17 16:28:29 +00:00
• fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau. ths 2007-04-17 15:26:47 +00:00
• 04f20795ac Move PowerPC 405 specific definitions into a separate file Preliminary code for -kernel option support for PowerPC 405 boards Fix DBSR in case of PowerPC 405 chip reset Add enums for PowerPC 405 clocks. Fix IRQ numbers (IBM reversed bits numbering...) Fix SPRG4-7 read access right Fix MSR mask in CPU definitions j_mayer 2007-04-17 02:50:56 +00:00
• 8035529250 Support it_shift for mmapped pckbd. ths 2007-04-16 22:47:54 +00:00
• 8ecc791352 Add callbacks to allow dynamic change of PowerPC clocks (to be improved) Fix embedded PowerPC watchdog and timers Fix PowerPC 405 SPR Add generic PowerPC 405 core instanciation code + resets support. Implement simple peripherals shared by most PowerPC 405 implementations PowerPC 405 EC & EP microcontrollers preliminary support j_mayer 2007-04-16 20:09:45 +00:00
• 3142255c62 Sparc host update (Ben Taylor, Martin Bochnig) blueswir1 2007-04-16 18:27:06 +00:00
• 6083f93345 Update OpenBIOS Sparc images to SVN 125 blueswir1 2007-04-16 17:41:15 +00:00
• ad6fe1d2d9 Acer Pica 61 machine, by Herve Poussineau. ths 2007-04-16 17:23:27 +00:00
• 2ca9d01385 Memory-mapped interface for RTC, by Herve Poussineau. ths 2007-04-16 17:21:21 +00:00
• b92bb99b80 Memory-mapped interface for PS/2 controller, by Herve Poussineau. ths 2007-04-16 17:20:48 +00:00
• 3a6078548d Cleanup and add more PowerPC core definitions. j_mayer 2007-04-16 09:31:49 +00:00
• c55e9aefa7 PowerPC 4xx software driven TLB fixes + debug traces. Add code provision for more MMU models support. j_mayer 2007-04-16 09:21:46 +00:00
• 0a032cbec6 Add reset callbacks for PowerPC CPU. Move cpu_ppc_init, cpu_ppc_close, cpu_ppc_reset and ppc_tlb_invalidate into helper.c as they are to be called from outside of the translated code. j_mayer 2007-04-16 08:56:52 +00:00
• dd37a5e4d7 PREP and heathrow machines only support PowerPC CPU with a 6xx bus. Mac99 machine may also support PowerPC 970 CPU. j_mayer 2007-04-16 07:41:07 +00:00
• d0dfae6e91 Add bus model (or input pins) into PowerPC CPU flags. Add PowerPC 970 bus and exceptions model. Add code provision for PowerPC 970 instanciation. j_mayer 2007-04-16 07:34:39 +00:00
• 08e46e54ea PowerPC emulation bugfixes: - don't generate multiple exit_tb at the end of conditional branches - disable TRACE exception as it is not correct for embedded PowerPC. j_mayer 2007-04-16 07:18:42 +00:00
• 95d1f3edd5 Parallel flash bugfixes: - always need to register flash area back to IO_MEM_ROMD at reset time - disabled buffered write as it's not actually supported - don't check flash time at registration time j_mayer 2007-04-16 07:14:26 +00:00
• a496775f87 Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdout j_mayer 2007-04-16 07:10:48 +00:00
• 9898128f55 Simplify branch likely handling. ths 2007-04-16 01:35:29 +00:00
• e9a9a0811f Remove unused variable. pbrook 2007-04-15 23:54:20 +00:00
• 171b31e7c7 Don't use T2 for INS, it conflicts with branch delay slot handling. ths 2007-04-15 21:26:37 +00:00
• 80c27194a7 Fix qemu SIGFPE caused by division-by-zero due to underflow. ths 2007-04-15 21:21:33 +00:00
• a85427b147 Small code generation optimization. ths 2007-04-15 19:52:12 +00:00
• fff739ccd5 Delete unused define. ths 2007-04-15 17:27:07 +00:00
• bc687ec922 Gallileo fixes, by Stefan Weil. ths 2007-04-15 15:15:10 +00:00
• 2a1094cd88 bFLT loader alignment fix. pbrook 2007-04-15 14:13:11 +00:00
• 080a0ba4b1 Update OpenBIOS for Sparc32 and add a Sparc64 image blueswir1 2007-04-15 06:38:29 +00:00
• aa6290b7e5 Fix format specified for watchpoint address. pbrook 2007-04-14 22:35:50 +00:00
• 8979596d17 Fix Sparc64 double float gdb protocol (initial version by Paul Brook) blueswir1 2007-04-14 16:15:48 +00:00
• 3ccacc4a16 Add device save and reset methods to FDC and M48T59 blueswir1 2007-04-14 13:01:31 +00:00
• 16c00cb2c2 Restart interrupts after an exception. ths 2007-04-14 12:56:46 +00:00
• dcb5b19a4e Know about more PCI device classes. ths 2007-04-14 12:24:46 +00:00
• 1c5bf3bf8c Fix incorrect pointers casts. j_mayer 2007-04-14 12:17:59 +00:00
• e96efcfcb1 Fix miscellaneous display warnings for PowerPC & alpha targets and parallel CFI flash driver. j_mayer 2007-04-14 12:17:09 +00:00
• ba13c4327e Add TARGET_FMT_plx to properly display target_phys_addr_t variables. j_mayer 2007-04-14 12:15:36 +00:00
• 744e091596 Nicer Log formatting. ths 2007-04-13 22:30:36 +00:00
• e58c8ba5f6 Another fix for CP0 Cause register handling. ths 2007-04-13 20:17:54 +00:00
• 5425a2164c Fix Sparc32 device save methods blueswir1 2007-04-13 19:24:07 +00:00
• 3299908c83 Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops blueswir1 2007-04-13 15:49:56 +00:00
• d2889a3efc Alignment check mechanism (not fully enabled yet) (Aurelien Jarno) blueswir1 2007-04-13 15:46:16 +00:00
• 24be5ae3a0 Add PowerPC 405 input pins (IRQ, resets, ...) model. j_mayer 2007-04-12 21:24:29 +00:00
• 2e719ba347 Embedded PowerPC Device Control Registers infrastructure. j_mayer 2007-04-12 21:11:03 +00:00
• 83b1fb88f8 Fix bad variable name. ths 2007-04-11 22:46:06 +00:00
• 2f6445458e Make SYNCI_Step and CCRes CPU-specific. ths 2007-04-11 20:34:23 +00:00
• b48cfdffd9 Throw RI for invalid MFMC0-class instructions. Introduce optional MIPS_STRICT_STANDARD define to adhere more to the spec than it makes sense in normal operation. ths 2007-04-11 02:24:14 +00:00
• 2423f6601a Code formatting fix. ths 2007-04-11 02:15:08 +00:00
• 534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may end up empty for 32bit mips, which dyngen trips over. ths 2007-04-11 02:13:00 +00:00
• e9df014c0b Implement embedded IRQ controller for PowerPC 6xx/740 & 750. Fix PowerPC external interrupt input handling and lowering. Fix OpenPIC output pins management. Fix multiples bugs in OpenPIC IRQ management. Fix OpenPIC CPU(s) reset function. Fix Mac99 machine to properly route OpenPIC outputs to the PowerPC input pins. Fix PREP machine to properly route i8259 output to the PowerPC external interrupt pin. j_mayer 2007-04-09 22:45:36 +00:00
• 682c4f1559 Fix monitor disasm output for Sparc64 target blueswir1 2007-04-09 15:14:57 +00:00
• c090a8f440 Fix CP0_IntCtl handling. ths 2007-04-09 14:17:31 +00:00
• c50da3df61 Proper handling of reserved bits in the context register. ths 2007-04-09 14:16:30 +00:00
• 4e7a4a4e84 Mark watchpoint features as unimplemented. ths 2007-04-09 14:15:41 +00:00
• 62c5609aa5 Catch unaligned sc/scd. ths 2007-04-09 14:14:21 +00:00
• 97428a4d84 Fix exception handling cornercase for rdhwr. ths 2007-04-09 14:13:40 +00:00
• dac9321024 Remove bogus mtc0 handling. ths 2007-04-09 12:31:31 +00:00
• 069dd10acf ARM IRQ fix. pbrook 2007-04-09 02:01:57 +00:00
• 6ecd453484 Fix generated code disasm output on Sparc64 host blueswir1 2007-04-08 11:22:29 +00:00
• 925fb139be Sparc32/64 CPU selection for user emulator blueswir1 2007-04-08 06:29:06 +00:00
• 1c6e907082 Fix TCX base on SS10 blueswir1 2007-04-07 19:33:54 +00:00
• d537cf6c86 Unify IRQ handling. pbrook 2007-04-07 18:14:41 +00:00
• b6e27ab8b1 PowerPC 64 fixes j_mayer 2007-04-07 11:48:04 +00:00
• 9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t instead of target_ulong to be consistent. j_mayer 2007-04-07 11:21:28 +00:00
• 80a34d67a5 Remove dead code. pbrook 2007-04-07 01:41:49 +00:00
• 544c4be626 Remove dead code. pbrook 2007-04-07 01:24:43 +00:00
• e0c84da78c Implement prefx. ths 2007-04-07 01:11:39 +00:00
• cbeb0857da Set proper BadVAddress value for unaligned instruction fetch. ths 2007-04-07 01:11:15 +00:00
• e04bcc691b Actually skip over delay slot for a non-taken branch likely. ths 2007-04-07 01:10:22 +00:00
• f757d6ff29 Fix ins/ext cornercase. ths 2007-04-07 01:09:17 +00:00
• d85fb99bf7 Comment spelling fix. pbrook 2007-04-06 20:58:25 +00:00
• 417454b032 Full implementation of IEEE exceptions (Aurelien Jarno) blueswir1 2007-04-06 20:03:29 +00:00
• c185970a0e Enforce even float register pair for double register ops (Aurelien Jarno) blueswir1 2007-04-06 20:02:09 +00:00
• beb811bdd6 Fix handling of ADES exceptions. ths 2007-04-06 19:31:06 +00:00
• f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception. ths 2007-04-06 18:46:01 +00:00
• 42a10898a8 Use correct type for card field. pbrook 2007-04-06 16:54:11 +00:00
• a1bb27b1e9 SD card emulation (initial implementation by Andrzei Zaborowski). pbrook 2007-04-06 16:49:48 +00:00
• 84409ddbda Code provision for x86_64 and PowerPC 64 linux user mode support. j_mayer 2007-04-06 08:56:50 +00:00
• 9ead1a1263 Add alpha targets. Code provision for x86_64 and PowerPC 64 linux user targets. j_mayer 2007-04-06 08:07:06 +00:00
• 9d53c7535f Fix for PowerPC 64 rotates. Fix for PowerPC 64 load & store with immediate index. j_mayer 2007-04-06 07:59:47 +00:00
• 74aa042996 Code provision for 64 bits linux user-mode targets support. j_mayer 2007-04-06 06:40:51 +00:00
• c53f4a62e3 fix branch delay slot cornercases. ths 2007-04-05 23:21:37 +00:00
• 5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed size. ths 2007-04-05 23:20:05 +00:00
• acd858d91f Handle EBase properly. ths 2007-04-05 23:18:13 +00:00
• 3529b538ce Fix disabling of the Cause register for R2. ths 2007-04-05 23:17:40 +00:00
• 1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise exceptions. ths 2007-04-05 23:16:25 +00:00
• f7cfb2a176 64bit MIPS FPUs have 32 registers. ths 2007-04-05 23:14:23 +00:00
• fb82fea064 Clear BEV and ERL for the fake bootloader. ths 2007-04-05 23:12:54 +00:00
• bf9525e9d8 Fix alpha target compilation on 32 bits hosts. j_mayer 2007-04-05 21:12:28 +00:00
• cf6c1b169c Rules needed to compile linux user-mode alpha target. j_mayer 2007-04-05 20:46:02 +00:00
• bedb69ea04 Temporary hack for alpha user-mode emulation. j_mayer 2007-04-05 20:08:21 +00:00
• f6b647cd9e Documentation update blueswir1 2007-04-05 18:40:23 +00:00
• 9143e59842 Fix stdfq op (Aurelien Jarno) blueswir1 2007-04-05 18:12:08 +00:00
• a4d17f1992 Fix co-processor branch and store ops (Aurelien Jarno) blueswir1 2007-04-05 18:09:15 +00:00
• 803b3c7b4d Fill in real SparcStation 10 values blueswir1 2007-04-05 17:00:23 +00:00
• eddf68a6ac Integrate Alpha target in Qemu core. j_mayer 2007-04-05 07:22:49 +00:00
• 7a3148a955 Preliminary patch for Alpha Linux user mode emulation support. j_mayer 2007-04-05 07:13:51 +00:00
• 86cc1ce083 Definitions needed for Alpha linux user-mode emulation. j_mayer 2007-04-05 07:06:55 +00:00
• b82945bcdb Alpha CPU palcode emulation. Only usable in user mode for now with code provision for full emulation support. j_mayer 2007-04-05 07:04:40 +00:00
• 4c9649a967 Alpha architecture emulation core. j_mayer 2007-04-05 06:58:33 +00:00
• 6fa4cea9e8 Infrastructure to support more than 2 MMU modes. Add example for Alpha and PowerPC hypervisor mode. j_mayer 2007-04-05 06:43:27 +00:00