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• 6baba3a7bb Fix pic in declare_dependency in meson.build Andrea Fioraldi 2021-12-21 12:27:45 +01:00
• 208d69342d Update QEMU git hash Andrea Fioraldi 2021-12-21 11:35:06 +01:00
• d2bc09a31b Format Andrea Fioraldi 2021-12-21 11:28:08 +01:00
• 0cce1e2b91 Update fuzzbench and fuzzbench_qemu, delete fuzzbench_gsoc Andrea Fioraldi 2021-12-21 11:26:04 +01:00
• 29ff573753 Merge remote-tracking branch 'upstream/master' Andrea Fioraldi 2021-12-21 11:09:43 +01:00
• 89f4df9595 MAINTAINERS: update D-Bus section Marc-André Lureau 2021-10-10 00:30:30 +04:00
• 7f767ca35e ui/dbus: register D-Bus VC handler Marc-André Lureau 2021-09-29 20:32:28 +04:00
• 3e301c8d7e ui/dbus: add chardev backend & interface Marc-André Lureau 2021-07-22 19:43:29 +04:00
• 4085b87ff0 option: add g_auto for QemuOpts Marc-André Lureau 2021-07-26 10:32:37 +04:00
• fa670c808a chardev: make socket derivable Marc-André Lureau 2021-07-26 00:03:01 +04:00
• 1b87751fb1 chardev: teach socket to accept no addresses Marc-André Lureau 2021-07-25 23:59:12 +04:00
• ff1a5810f6 ui/dbus: add clipboard interface Marc-André Lureau 2021-07-20 16:02:52 +04:00
• 739362d420 audio: add "dbus" audio backend Marc-André Lureau 2021-03-09 17:15:28 +04:00
• b4dd5b6a60 tests: start dbus-display-test Marc-André Lureau 2021-10-07 01:08:15 +04:00
• 2c7294d72c tests/qtests: add qtest_qmp_add_client() Marc-André Lureau 2021-10-07 01:07:30 +04:00
• 99997823bb ui/dbus: add p2p=on/off option Marc-André Lureau 2021-10-10 00:16:57 +04:00
• 142ca628a7 ui: add a D-Bus display backend Marc-André Lureau 2021-07-15 11:53:53 +04:00
• d83acfd013 build-sys: set glib dependency version Marc-André Lureau 2021-10-09 17:37:40 +04:00
• ef20c5ba08 docs: add dbus-display documentation Marc-André Lureau 2021-10-06 01:41:01 +04:00
• d2f25776ca docs: move D-Bus VMState documentation to source XML Marc-André Lureau 2021-10-06 01:35:29 +04:00
• 61534882e7 backends: move dbus-vmstate1.xml to backends/ Marc-André Lureau 2021-10-06 01:18:42 +04:00
• 2668dc7b5d docs/sphinx: add sphinx modules to include D-Bus documentation Marc-André Lureau 2021-10-06 01:00:35 +04:00
• 20f19713ef scripts: teach modinfo to skip non-C sources Marc-André Lureau 2021-07-15 11:54:13 +04:00
• ebced09185 console: save current scanout details Marc-André Lureau 2021-02-20 16:23:03 +04:00
• f6ef71bded ui: move qemu_spice_fill_device_address to ui/util.c Marc-André Lureau 2021-02-15 15:10:36 +04:00
• 5e79d516e8 ui: split the GL context in a different object Marc-André Lureau 2021-10-09 23:48:46 +04:00
• 7cc712e986 ui: dispatch GL events to all listeners Marc-André Lureau 2021-01-26 00:00:30 +04:00
• f6413cbfd0 ui: simplify gl unblock & flush Marc-André Lureau 2021-03-11 12:11:37 +04:00
• a9b1e471e1 ui: add a gl-unblock warning timer Marc-André Lureau 2021-03-11 11:56:58 +04:00
• a4ddc31417 ui: make gl_block use a counter Marc-André Lureau 2021-03-11 11:45:33 +04:00
• ac32b2fff1 ui: associate GL context outside of display listener registration Marc-André Lureau 2021-01-25 15:10:36 +04:00
• 4f41814991 ui: factor out qemu_console_set_display_gl_ctx() Marc-André Lureau 2021-01-25 14:53:18 +04:00
• ca19ef5299 ui: do not delay further remote resize Marc-André Lureau 2021-04-13 20:39:11 +04:00
• 46e4609e33 virtio-gpu: use VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP Marc-André Lureau 2021-05-04 12:07:46 +04:00
• 8f5f1ea0c0 hw/display: report an error if virgl initialization failed Marc-André Lureau 2021-07-01 11:08:54 +04:00
• 505dbf9b99 ui/clipboard: add a clipboard reset serial event Marc-André Lureau 2021-07-19 19:49:56 +04:00
• 349504e5a1 ui/clipboard: add qemu_clipboard_check_serial() Marc-André Lureau 2021-07-21 15:19:13 +04:00
• 835f69f4e6 ui/vdagent: add serial capability support Marc-André Lureau 2021-07-19 00:33:31 +04:00
• 1b17f1e9f9 ui: generalize clipboard notifier Marc-André Lureau 2021-07-19 19:42:15 +04:00
• 5912745288 ui/vdagent: replace #if 0 with protocol version check Marc-André Lureau 2021-10-06 14:25:44 +04:00
• ddece46576 ui/vdagent: add CHECK_SPICE_PROTOCOL_VERSION Marc-André Lureau 2021-10-06 14:18:09 +04:00
• 2bf40d0841 Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into staging Richard Henderson 2021-12-20 13:20:07 -08:00
• c7d773ae49 Merge tag 'pull-riscv-to-apply-20211220-1' of github.com:alistair23/qemu into staging Richard Henderson 2021-12-20 10:25:40 -08:00
• 3363615a65 meson: Move bsd_user_ss to bsd-user/ Richard Henderson 2021-11-17 16:35:01 +01:00
• 4d06bb4e03 meson: Move linux_user_ss to linux-user/ Richard Henderson 2021-11-17 16:32:06 +01:00
• ff9c1e5500 linux-user: Move thunk.c from top-level Richard Henderson 2021-11-17 16:26:14 +01:00
• 5bfd125ec8 common-user: Adjust system call return on FreeBSD Richard Henderson 2021-11-23 15:18:49 +01:00
• bbf15aaf7c common-user: Move safe-syscall.* from linux-user Richard Henderson 2021-11-17 16:14:00 +01:00
• 2aa0ca5ef1
  Frida shadow fix (#425) Dongjia Zhang 2021-12-20 18:51:45 +09:00
• 7e322a7f23 hw/riscv: Use load address rather than entry point for fw_dynamic next_addr Jessica Clarke 2021-12-14 03:24:56 +00:00
• 0643c12e4b target/riscv: Enable bitmanip Zb[abcs] instructions Vineet Gupta 2021-12-15 21:18:44 -08:00
• a7cad953fa riscv: Set 5.4 as minimum kernel version for riscv32 Khem Raj 2021-12-15 23:31:11 -08:00
• cc13aa3614 target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions Frank Chang 2021-12-10 15:57:03 +08:00
• 45ca2ca6bd target/riscv: rvv-1.0: update opivv_vadc_check() comment Frank Chang 2021-12-10 15:57:02 +08:00
• 9c0d2559de target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm Frank Chang 2021-12-10 15:57:01 +08:00
• 26086aea0d target/riscv: rvv-1.0: add vector unit-stride mask load/store insns Frank Chang 2021-12-10 15:57:00 +08:00
• 5c89e9c096 target/riscv: rvv-1.0: add evl parameter to vext_ldst_us() Frank Chang 2021-12-10 15:56:59 +08:00
• 34a2c2d81a target/riscv: rvv-1.0: add vsetivli instruction Frank Chang 2021-12-10 15:56:58 +08:00
• 6b5c8eb3e7 target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 Frank Chang 2021-12-10 15:56:57 +08:00
• 55c35407c3 target/riscv: rvv-1.0: floating-point reciprocal estimate instruction Frank Chang 2021-12-10 15:56:56 +08:00
• e848a1e563 target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction Frank Chang 2021-12-10 15:56:55 +08:00
• 719d3561b2 target/riscv: gdb: support vector registers for rv64 & rv32 Hsiangkai Wang 2021-12-10 15:56:54 +08:00
• d6c4d3f2a6 target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid Frank Chang 2021-12-10 15:56:53 +08:00
• f714361ed7 target/riscv: rvv-1.0: implement vstart CSR Frank Chang 2021-12-10 15:56:52 +08:00
• 8a4b52575a target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits Frank Chang 2021-12-10 15:56:51 +08:00
• ff679b58e3 target/riscv: rvv-1.0: narrowing floating-point/integer type-convert Frank Chang 2021-12-10 15:56:50 +08:00
• 75804f7131 target/riscv: add "set round to odd" rounding mode helper function Frank Chang 2021-12-10 15:56:49 +08:00
• 3ce4c09df7 target/riscv: rvv-1.0: widening floating-point/integer type-convert Frank Chang 2021-12-10 15:56:48 +08:00
• 900da87ab9 target/riscv: rvv-1.0: floating-point/integer type-convert instructions Frank Chang 2021-12-10 15:56:47 +08:00
• 986c895de1 target/riscv: introduce floating-point rounding mode enum Frank Chang 2021-12-10 15:56:46 +08:00
• 49c5611a97 target/riscv: rvv-1.0: floating-point min/max instructions Frank Chang 2021-12-10 15:56:45 +08:00
• c3536f2f55 target/riscv: rvv-1.0: remove integer extract instruction Frank Chang 2021-12-10 15:56:44 +08:00
• e29c5cefd8 target/riscv: rvv-1.0: remove vmford.vv and vmford.vf Frank Chang 2021-12-10 15:56:43 +08:00
• a12c812d19 target/riscv: rvv-1.0: remove widening saturating scaled multiply-add Frank Chang 2021-12-10 15:56:42 +08:00
• 74eb7834bc target/riscv: rvv-1.0: single-width scaling shift instructions Frank Chang 2021-12-10 15:56:41 +08:00
• b8dd99f2d1 target/riscv: rvv-1.0: widening floating-point reduction instructions Frank Chang 2021-12-10 15:56:40 +08:00
• 08b60eebc4 target/riscv: rvv-1.0: single-width floating-point reduction Frank Chang 2021-12-10 15:56:39 +08:00
• a70b3a73e7 target/riscv: rvv-1.0: narrowing fixed-point clip instructions Frank Chang 2021-12-10 15:56:38 +08:00
• 8500d4ab2e target/riscv: rvv-1.0: floating-point slide instructions Frank Chang 2021-12-10 15:56:37 +08:00
• 6438ed61de target/riscv: rvv-1.0: slide instructions Frank Chang 2021-12-10 15:56:36 +08:00
• 50f6696c0f target/riscv: rvv-1.0: mask-register logical instructions Frank Chang 2021-12-10 15:56:35 +08:00
• e70aa16e5e target/riscv: rvv-1.0: floating-point compare instructions Frank Chang 2021-12-10 15:56:34 +08:00
• 063f8bbca0 target/riscv: rvv-1.0: integer comparison instructions Frank Chang 2021-12-10 15:56:33 +08:00
• d6be7a3504 target/riscv: rvv-1.0: single-width saturating add and subtract instructions Frank Chang 2021-12-10 15:56:32 +08:00
• f51c3cf1fa target/riscv: rvv-1.0: widening integer multiply-add instructions Frank Chang 2021-12-10 15:56:31 +08:00
• 7daa5852bc target/riscv: rvv-1.0: narrowing integer right shift instructions Frank Chang 2021-12-10 15:56:30 +08:00
• bb45485ad1 target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow Frank Chang 2021-12-10 15:56:29 +08:00
• a75ae09f2a target/riscv: rvv-1.0: single-width bit shift instructions Frank Chang 2021-12-10 15:56:28 +08:00
• 8b99a110f7 target/riscv: rvv-1.0: single-width averaging add and subtract instructions Frank Chang 2021-12-10 15:56:27 +08:00
• cd01340e75 target/riscv: rvv-1.0: integer extension instructions Frank Chang 2021-12-10 15:56:26 +08:00
• 6b85975e11 target/riscv: rvv-1.0: whole register move instructions Frank Chang 2021-12-10 15:56:25 +08:00
• 5c4eb8fb56 target/riscv: rvv-1.0: floating-point scalar move instructions Frank Chang 2021-12-10 15:56:24 +08:00
• c4b3e46f00 target/riscv: rvv-1.0: floating-point move instruction Frank Chang 2021-12-10 15:56:23 +08:00
• dedc53cbc9 target/riscv: rvv-1.0: integer scalar move instructions Frank Chang 2021-12-10 15:56:22 +08:00
• 50bfb45b2c target/riscv: rvv-1.0: register gather instructions Frank Chang 2021-12-10 15:56:21 +08:00
• 308ee80578 target/riscv: rvv-1.0: allow load element with sign-extended Frank Chang 2021-12-10 15:56:20 +08:00
• f4f47e04de target/riscv: rvv-1.0: element index instruction Frank Chang 2021-12-10 15:56:19 +08:00
• ee17eaa120 target/riscv: rvv-1.0: iota instruction Frank Chang 2021-12-10 15:56:18 +08:00
• 40c1495d69 target/riscv: rvv-1.0: set-X-first mask bit instructions Frank Chang 2021-12-10 15:56:17 +08:00
• d71a24fc82 target/riscv: rvv-1.0: find-first-set mask bit instruction Frank Chang 2021-12-10 15:56:16 +08:00