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• 0014aa741d target/riscv: rvv-1.0: count population in mask instruction Frank Chang 2021-12-10 15:56:15 +08:00
• 0676d8e3dc target/riscv: rvv-1.0: floating-point classify instructions Frank Chang 2021-12-10 15:56:14 +08:00
• 20f2079acf target/riscv: rvv-1.0: floating-point square-root instruction Frank Chang 2021-12-10 15:56:13 +08:00
• a689a82b7f target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation Frank Chang 2021-12-10 15:56:12 +08:00
• 5a9f8e1552 target/riscv: rvv-1.0: update vext_max_elems() for load/store insns Frank Chang 2021-12-10 15:56:11 +08:00
• 30206bd842 target/riscv: rvv-1.0: load/store whole register instructions Frank Chang 2021-12-10 15:56:10 +08:00
• d3e5e2ff4f target/riscv: rvv-1.0: fault-only-first unit stride load Frank Chang 2021-12-10 15:56:09 +08:00
• 83fcd573b1 target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns Frank Chang 2021-12-10 15:56:08 +08:00
• 08b9d0ed4a target/riscv: rvv-1.0: index load and store instructions Frank Chang 2021-12-10 15:56:07 +08:00
• 79556fb6fa target/riscv: rvv-1.0: stride load and store instructions Frank Chang 2021-12-10 15:56:06 +08:00
• d9b7609a1f target/riscv: rvv-1.0: configure instructions Frank Chang 2021-12-10 15:56:05 +08:00
• 57a2d89a82 target/riscv: rvv-1.0: remove amo operations instructions Frank Chang 2021-12-10 15:56:04 +08:00
• 9b4a40a786 target/riscv: rvv:1.0: add translation-time nan-box helper function Frank Chang 2021-12-10 15:56:03 +08:00
• ff64fc91d1 target/riscv: introduce more imm value modes in translator functions Frank Chang 2021-12-10 15:56:02 +08:00
• f31dacd720 target/riscv: rvv-1.0: update check functions Frank Chang 2021-12-10 15:56:01 +08:00
• 3479a814e4 target/riscv: rvv-1.0: add VMA and VTA Frank Chang 2021-12-10 15:56:00 +08:00
• 33f1beaf12 target/riscv: rvv-1.0: add fractional LMUL Frank Chang 2021-12-10 15:55:59 +08:00
• f9298de514 target/riscv: rvv-1.0: remove MLEN calculations Frank Chang 2021-12-10 15:55:58 +08:00
• 6bc3dfa96d target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers Frank Chang 2021-12-10 15:55:57 +08:00
• 2e56505475 target/riscv: rvv-1.0: add vlenb register Greentime Hu 2021-12-10 15:55:56 +08:00
• 4594fa5a96 target/riscv: rvv-1.0: add vcsr register LIU Zhiwei 2021-12-10 15:55:55 +08:00
• 9bd291f6e3 target/riscv: rvv-1.0: remove rvv related codes from fcsr registers Frank Chang 2021-12-10 15:55:54 +08:00
• 8e1ee1fb57 target/riscv: rvv-1.0: add translation-time vector context status Frank Chang 2021-12-10 15:55:53 +08:00
• 7b07a37c2c target/riscv: rvv-1.0: introduce writable misa.v field Frank Chang 2021-12-10 15:55:52 +08:00
• 89a81e376a target/riscv: rvv-1.0: add sstatus VS field LIU Zhiwei 2021-12-10 15:55:51 +08:00
• c36b2f1a4d target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty Frank Chang 2021-12-10 15:55:50 +08:00
• 61b4b69d12 target/riscv: rvv-1.0: add mstatus VS field LIU Zhiwei 2021-12-10 15:55:49 +08:00
• 52561f2a80 target/riscv: Use FIELD_EX32() to extract wd field Frank Chang 2021-12-10 15:55:48 +08:00
• 9ec6622db3 target/riscv: drop vector 0.7.1 and add 1.0 support Frank Chang 2021-12-10 15:55:47 +08:00
• e523773040 target/riscv: zfh: add Zfhmin cpu property Frank Chang 2021-12-10 15:43:27 +08:00
• 2d258b428b target/riscv: zfh: implement zfhmin extension Frank Chang 2021-12-10 15:43:26 +08:00
• 13fb8c7b42 target/riscv: zfh: add Zfh cpu property Frank Chang 2021-12-10 15:43:25 +08:00
• 6bc6fc96d1 target/riscv: zfh: half-precision floating-point classify Kito Cheng 2021-12-10 15:43:24 +08:00
• 11f9c450a6 target/riscv: zfh: half-precision floating-point compare Kito Cheng 2021-12-10 15:43:23 +08:00
• 7b03c8e5b5 target/riscv: zfh: half-precision convert and move Kito Cheng 2021-12-10 15:43:22 +08:00
• 00c1899f12 target/riscv: zfh: half-precision computational Kito Cheng 2021-12-10 15:43:21 +08:00
• 915f77b211 target/riscv: zfh: half-precision load and store Kito Cheng 2021-12-10 15:43:20 +08:00
• 2ac16d01e3 bsd-user: Create special-errno.h Richard Henderson 2021-11-17 05:32:17 -08:00
• 5da4063f64 linux-user: Create special-errno.h Richard Henderson 2021-11-17 15:46:05 +01:00
• 57a0c9384c linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGRETURN Richard Henderson 2021-11-17 05:14:52 -08:00
• ea8ee3ee93 bsd-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS Richard Henderson 2021-11-22 19:49:02 +01:00
• af254a2792 linux-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS Richard Henderson 2021-11-22 19:47:33 +01:00
• 0a7e01904d linux-user: Remove HAVE_SAFE_SYSCALL and hostdep.h Richard Henderson 2021-11-15 22:08:23 +03:00
• 95c021dac8 linux-user/host/sparc64: Add safe-syscall.inc.S Richard Henderson 2021-11-15 22:03:28 +03:00
• 4542adef5b linux-user/host/mips: Add safe-syscall.inc.S Richard Henderson 2021-11-22 17:38:34 +01:00
• a3310c0397 linux-user: Move syscall error detection into safe_syscall_base Richard Henderson 2021-11-15 14:08:52 +01:00
• b9d2af3c62 linux-user: Untabify all safe-syscall.inc.S Richard Henderson 2021-11-23 11:44:55 +01:00
• 212a33d3b0 Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging Richard Henderson 2021-12-19 16:36:10 -08:00
• 5a3a2eb3b1 hw/i386/vmmouse: Require 'i8042' property to be set Philippe Mathieu-Daudé 2021-12-01 23:32:53 +01:00
• 08c34c642d tests/qtest/fuzz-megasas-test: Add test for GitLab issue #521 Philippe Mathieu-Daudé 2021-11-19 21:11:41 +01:00
• 97a2b074d1 hw/scsi/megasas: Fails command if SGL buffer overflows Philippe Mathieu-Daudé 2021-11-19 21:11:40 +01:00
• 7a3ce79c06 hw/scsi: Fix scsi_bus_init_named() docstring Philippe Mathieu-Daudé 2021-11-22 11:47:44 +01:00
• b20a7ee6f0 meson: add "check" argument to run_command Paolo Bonzini 2021-12-17 09:52:03 +01:00
• ad5439bb53 cpu: remove unnecessary #ifdef CONFIG_TCG Paolo Bonzini 2021-10-08 13:33:08 +02:00
• 7a82413dbd meson: reenable test-fdmon-epoll Paolo Bonzini 2021-10-13 11:39:05 +02:00
• 5dce7b8d8c configure: remove DIRS Paolo Bonzini 2021-10-13 13:56:24 +02:00
• 0f457147f4 configure: remove unnecessary symlinks Paolo Bonzini 2021-11-08 10:45:30 +01:00
• 823eb01345 configure, meson: move ARCH to meson.build Paolo Bonzini 2021-11-08 14:18:17 +01:00
• ffb91f68b1 meson: rename "arch" variable Paolo Bonzini 2021-11-08 15:44:39 +01:00
• 4da270be1c configure: unify x86_64 and x32 Paolo Bonzini 2021-11-09 09:36:10 +01:00
• d8ff892dc2 configure: unify ppc64 and ppc64le Paolo Bonzini 2021-11-09 09:18:20 +01:00
• e4da0e39df configure: unify two case statements on $cpu Paolo Bonzini 2021-11-09 09:23:56 +01:00
• 65eff01bcf configure: move target detection before CPU detection Paolo Bonzini 2021-11-08 22:52:35 +01:00
• ba7c60c203 configure: make $targetos lowercase, use windows instead of MINGW32 Paolo Bonzini 2021-11-08 14:47:54 +01:00
• 90978e15bc Merge tag 'trivial-branch-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging Richard Henderson 2021-12-17 13:15:38 -08:00
• 93dc314c92 Merge tag 'pull-ppc-20211217' of https://github.com/legoater/qemu into staging Richard Henderson 2021-12-17 09:55:14 -08:00
• 0e6232bc3c ppc/pnv: Use QOM hierarchy to scan PEC PHB4 devices Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 13480fc58a ppc/pnv: Move realize of PEC stacks under the PEC model Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 8da4f8f7b7 ppc/pnv: Remove "system-memory" property from PHB4 PEC Cédric Le Goater 2021-12-17 17:57:19 +01:00
• aa8cc84d88 ppc/pnv: Compute the PHB index from the PHB4 PEC model Cédric Le Goater 2021-12-17 17:57:19 +01:00
• cf0ee6955c ppc/pnv: Introduce a num_stack class attribute Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 6f43d2551f ppc/pnv: Introduce a "chip" property under the PHB4 model Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 12060cbd3f ppc/pnv: Introduce version and device_id class atributes for PHB4 devices Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 422fd92e61 ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 2ff73dda02 ppc/pnv: Use QOM hierarchy to scan PHB3 devices Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 10841a76eb ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize() Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 9e59b09ccf ppc/pnv: Drop the "num-phbs" property Cédric Le Goater 2021-12-17 17:57:19 +01:00
• a8fa95c7e6 ppc/pnv: Use the chip class to check the index of PHB3 devices Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 2c4d3a501e ppc/pnv: Introduce a "chip" property under PHB3 Cédric Le Goater 2021-12-17 17:57:19 +01:00
• 1f26c75191 PPC64/TCG: Implement 'rfebb' instruction Daniel Henrique Barboza 2021-12-17 17:57:19 +01:00
• 7aeac354a6 target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• 46d396bde9 target/ppc: enable PMU instruction count Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• 1474ba6d10 target/ppc: enable PMU counter overflow with cycle events Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• a6f91249e0 target/ppc: PMU: update counters on MMCR1 write Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• 308b9fad2a target/ppc: PMU: update counters on PMCs r/w Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• c2eff582a3 target/ppc: PMU basic cycle count for pseries TCG Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• 8f2e9d4003 target/ppc: introduce PMUEventType and PMU overflow timers Daniel Henrique Barboza 2021-12-17 17:57:18 +01:00
• 29c4a3363b Revert "target/ppc: Move SPR_DSISR setting to powerpc_excp" Fabiano Rosas 2021-12-17 17:57:18 +01:00
• 7fc1dc8313 target/ppc: Fix e6500 boot Fabiano Rosas 2021-12-17 17:57:18 +01:00
• caf6f9b568 target/ppc: move xscvqpdp to decodetree Matheus Ferst 2021-12-17 17:57:18 +01:00
• 38d4914c50 target/ppc: fix xscvqpdp register access Matheus Ferst 2021-12-17 17:57:18 +01:00
• c5df1898a1 target/ppc: Move xs{max,min}[cj]dp to decodetree Victor Colombo 2021-12-17 17:57:18 +01:00
• 201fc774e0 target/ppc: Fix xs{max, min}[cj]dp to use VSX registers Victor Colombo 2021-12-17 17:57:18 +01:00
• 6518c0ede9 ppc/ppc405: Add update of bi_procfreq field Cédric Le Goater 2021-12-17 17:57:17 +01:00
• e0caa8e64d ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information Cédric Le Goater 2021-12-17 17:57:17 +01:00
• cada9f30d3 ppc/ppc405: Change default PLL values at reset Cédric Le Goater 2021-12-17 17:57:17 +01:00
• 337270b2a5 ppc/ppc405: Fix boot from kernel Cédric Le Goater 2021-12-17 17:57:17 +01:00
• e3931ecab3 ppc/ppc405: Introduce ppc405_set_default_bootinfo() Cédric Le Goater 2021-12-17 17:57:17 +01:00
• 13d63de59b ppc/ppc405: Rework FW load Cédric Le Goater 2021-12-17 17:57:17 +01:00
• 9fb100efa1 ppc/ppc405: Remove flash support Cédric Le Goater 2021-12-17 17:57:17 +01:00