Romain Malmain
7c3c7877d8
Update to QEMU 9.0.0 ( #67 )
...
* Update to QEMU v9.0.0
---------
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zheyu Ma <zheyuma97@gmail.com>
Signed-off-by: Ido Plat <ido.plat@ibm.com>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
Signed-off-by: Gregory Price <gregory.price@memverge.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com>
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Joonas Kankaala <joonas.a.kankaala@gmail.com>
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Oleg Sviridov <oleg.sviridov@red-soft.ru>
Signed-off-by: Artem Chernyshev <artem.chernyshev@red-soft.ru>
Signed-off-by: Yajun Wu <yajunw@nvidia.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Signed-off-by: Lei Wang <lei4.wang@intel.com>
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Signed-off-by: Martin Hundebøll <martin@geanix.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Wafer <wafer@jaguarmicro.com>
Signed-off-by: Yuxue Liu <yuxue.liu@jaguarmicro.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nguyen Dinh Phi <phind.uet@gmail.com>
Signed-off-by: Zack Buhman <zack@buhman.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Yuquan Wang wangyuquan1236@phytium.com.cn
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Cindy Lu <lulu@redhat.com>
Co-authored-by: Peter Maydell <peter.maydell@linaro.org>
Co-authored-by: Fabiano Rosas <farosas@suse.de>
Co-authored-by: Peter Xu <peterx@redhat.com>
Co-authored-by: Thomas Huth <thuth@redhat.com>
Co-authored-by: Cédric Le Goater <clg@redhat.com>
Co-authored-by: Zheyu Ma <zheyuma97@gmail.com>
Co-authored-by: Ido Plat <ido.plat@ibm.com>
Co-authored-by: Ilya Leoshkevich <iii@linux.ibm.com>
Co-authored-by: Markus Armbruster <armbru@redhat.com>
Co-authored-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Co-authored-by: Paolo Bonzini <pbonzini@redhat.com>
Co-authored-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Co-authored-by: David Hildenbrand <david@redhat.com>
Co-authored-by: Kevin Wolf <kwolf@redhat.com>
Co-authored-by: Stefan Reiter <s.reiter@proxmox.com>
Co-authored-by: Fiona Ebner <f.ebner@proxmox.com>
Co-authored-by: Gregory Price <gregory.price@memverge.com>
Co-authored-by: Lorenz Brun <lorenz@brun.one>
Co-authored-by: Yao Xingtao <yaoxt.fnst@fujitsu.com>
Co-authored-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Co-authored-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Co-authored-by: BALATON Zoltan <balaton@eik.bme.hu>
Co-authored-by: Igor Mammedov <imammedo@redhat.com>
Co-authored-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Co-authored-by: Richard Henderson <richard.henderson@linaro.org>
Co-authored-by: Sven Schnelle <svens@stackframe.org>
Co-authored-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Co-authored-by: Helge Deller <deller@kernel.org>
Co-authored-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Co-authored-by: Benjamin Gray <bgray@linux.ibm.com>
Co-authored-by: Nicholas Piggin <npiggin@gmail.com>
Co-authored-by: Avihai Horon <avihaih@nvidia.com>
Co-authored-by: Michael Tokarev <mjt@tls.msk.ru>
Co-authored-by: Joonas Kankaala <joonas.a.kankaala@gmail.com>
Co-authored-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Co-authored-by: Stefan Weil <sw@weilnetz.de>
Co-authored-by: Dayu Liu <liu.dayu@zte.com.cn>
Co-authored-by: Zhao Liu <zhao1.liu@intel.com>
Co-authored-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Co-authored-by: Artem Chernyshev <artem.chernyshev@red-soft.ru>
Co-authored-by: Yajun Wu <yajunw@nvidia.com>
Co-authored-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Co-authored-by: Pierre-Clément Tosi <ptosi@google.com>
Co-authored-by: Wei Wang <wei.w.wang@intel.com>
Co-authored-by: Martin Hundebøll <martin@geanix.com>
Co-authored-by: Michael S. Tsirkin <mst@redhat.com>
Co-authored-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Co-authored-by: Wafer <wafer@jaguarmicro.com>
Co-authored-by: lyx634449800 <yuxue.liu@jaguarmicro.com>
Co-authored-by: Gerd Hoffmann <kraxel@redhat.com>
Co-authored-by: Nguyen Dinh Phi <phind.uet@gmail.com>
Co-authored-by: Zack Buhman <zack@buhman.org>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Co-authored-by: Cindy Lu <lulu@redhat.com>
2024-05-01 16:10:20 +02:00
Romain Malmain
46273983f3
Update QEMU to v8.2.2 ( #63 )
...
* Merge with QEMU v8.2.2
2024-04-18 11:53:28 +02:00
Zhao Liu
f58db4eeb1
tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count2 test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-CNE3C2, Mon Oct 23 15:25:01 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-WKE3C2, Mon Oct 23 15:25:01 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000CA6
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 2C
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[434h 1076 1] Subtable Type : 00 [Processor Local APIC]
+[435h 1077 1] Length : 08
+[436h 1078 1] Processor ID : 81
+[437h 1079 1] Local Apic ID : 81
+[438h 1080 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[43Ch 1084 1] Subtable Type : 09 [Processor Local x2APIC]
+[43Dh 1085 1] Length : 10
+[43Eh 1086 2] Reserved : 0000
+[440h 1088 4] Processor x2Apic ID : 00000100
+[444h 1092 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[448h 1096 4] Processor UID : 00000082
[snip]
+[C4Ch 3148 1] Subtable Type : 09 [Processor Local x2APIC]
+[C4Dh 3149 1] Length : 10
+[C4Eh 3150 2] Reserved : 0000
+[C50h 3152 4] Processor x2Apic ID : 00000181
+[C54h 3156 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+[C58h 3160 4] Processor UID : 00000103
+
+[C5Ch 3164 1] Subtable Type : 01 [I/O APIC]
+[C5Dh 3165 1] Length : 0C
+[C5Eh 3166 1] I/O Apic ID : 00
+[C5Fh 3167 1] Reserved : 00
+[C60h 3168 4] Address : FEC00000
+[C64h 3172 4] Interrupt : 00000000
+
+[C68h 3176 1] Subtable Type : 02 [Interrupt Source Override]
+[C69h 3177 1] Length : 0A
+[C6Ah 3178 1] Bus : 00
+[C6Bh 3179 1] Source : 00
+[C6Ch 3180 4] Interrupt : 00000002
+[C70h 3184 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
[snip]
+[C90h 3216 1] Subtable Type : 02 [Interrupt Source Override]
+[C91h 3217 1] Length : 0A
+[C92h 3218 1] Bus : 00
+[C93h 3219 1] Source : 0B
+[C94h 3220 4] Interrupt : 0000000B
+[C98h 3224 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[C9Ah 3226 1] Subtable Type : 0A [Local x2APIC NMI]
+[C9Bh 3227 1] Length : 0C
+[C9Ch 3228 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[C9Eh 3230 4] Processor UID : FFFFFFFF
+[CA2h 3234 1] Interrupt Input LINT : 01
+[CA3h 3235 3] Reserved : 000000
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-CDE3C2, Mon Oct 23 15:25:01 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x000083EA (33770)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0x01
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
[snip]
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C081, 0x81, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x81))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x81, 0x81, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x81)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x81, Arg0, Arg1, Arg2)
+ }
+ }
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231023094635.1588282-17-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
7cb953ca19
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count2 test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 1 - 3.
List the ACPI tables that will be added to test the thread count2 field
of smbios type4 table.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-15-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
a775cb191e
tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-1NP791, Wed Aug 23 21:51:31 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-2JP791, Wed Aug 23 21:51:31 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000220
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 63
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[1D4h 0468 1] Subtable Type : 00 [Processor Local APIC]
+[1D5h 0469 1] Length : 08
+[1D6h 0470 1] Processor ID : 35
+[1D7h 0471 1] Local Apic ID : 6A
+[1D8h 0472 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+ Runtime Online Capable : 0
+
+[1DCh 0476 1] Subtable Type : 01 [I/O APIC]
+[1DDh 0477 1] Length : 0C
+[1DEh 0478 1] I/O Apic ID : 00
+[1DFh 0479 1] Reserved : 00
+[1E0h 0480 4] Address : FEC00000
+[1E4h 0484 4] Interrupt : 00000000
+
+[1E8h 0488 1] Subtable Type : 02 [Interrupt Source Override]
+[1E9h 0489 1] Length : 0A
+[1EAh 0490 1] Bus : 00
+[1EBh 0491 1] Source : 00
+[1ECh 0492 4] Interrupt : 00000002
+[1F0h 0496 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+
+[1F2h 0498 1] Subtable Type : 02 [Interrupt Source Override]
+[1F3h 0499 1] Length : 0A
+[1F4h 0500 1] Bus : 00
+[1F5h 0501 1] Source : 05
+[1F6h 0502 4] Interrupt : 00000005
+[1FAh 0506 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[1FCh 0508 1] Subtable Type : 02 [Interrupt Source Override]
+[1FDh 0509 1] Length : 0A
+[1FEh 0510 1] Bus : 00
+[1FFh 0511 1] Source : 09
+[200h 0512 4] Interrupt : 00000009
+[204h 0516 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[206h 0518 1] Subtable Type : 02 [Interrupt Source Override]
+[207h 0519 1] Length : 0A
+[208h 0520 1] Bus : 00
+[209h 0521 1] Source : 0A
+[20Ah 0522 4] Interrupt : 0000000A
+[20Eh 0526 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[210h 0528 1] Subtable Type : 02 [Interrupt Source Override]
+[211h 0529 1] Length : 0A
+[212h 0530 1] Bus : 00
+[213h 0531 1] Source : 0B
+[214h 0532 4] Interrupt : 0000000B
+[218h 0536 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[21Ah 0538 1] Subtable Type : 04 [Local APIC NMI]
+[21Bh 0539 1] Length : 06
+[21Ch 0540 1] Processor ID : FF
+[21Dh 0541 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[21Fh 0543 1] Interrupt Input LINT : 01
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-00O791, Wed Aug 23 21:51:31 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x00003271 (12913)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0xAF
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
[snip]
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C035, 0x35, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x35))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x35, 0x6A, 0x01, 0x00, 0x00, 0x00 // ..5j....
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x35)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x35, Arg0, Arg1, Arg2)
+ }
+ }
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-14-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
85ccbe1275
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 1 - 3.
List the ACPI tables that will be added to test the thread count field
of smbios type4 table.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-12-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
f03359a85b
tests: bios-tables-test: Update ACPI table binaries for smbios core count2 test
...
Change the core count2 from 275 to 260.
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
APIC:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.core-count2, Wed Aug 23 16:29:51 2023
+ * Disassembly of /tmp/aml-KQDX91, Wed Aug 23 16:29:51 2023
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
-[004h 0004 4] Table Length : 000009AE
+[004h 0004 4] Table Length : 00000CA6
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : CE
+[009h 0009 1] Checksum : FA
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
@@ -1051,1256 +1051,1136 @@
[42Ch 1068 1] Subtable Type : 00 [Processor Local APIC]
[42Dh 1069 1] Length : 08
[42Eh 1070 1] Processor ID : 80
[42Fh 1071 1] Local Apic ID : 80
[430h 1072 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[434h 1076 1] Subtable Type : 00 [Processor Local APIC]
[435h 1077 1] Length : 08
[436h 1078 1] Processor ID : 81
[437h 1079 1] Local Apic ID : 81
[438h 1080 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
-[43Ch 1084 1] Subtable Type : 00 [Processor Local APIC]
-[43Dh 1085 1] Length : 08
-[43Eh 1086 1] Processor ID : 82
-[43Fh 1087 1] Local Apic ID : 82
-[440h 1088 4] Flags (decoded below) : 00000001
- Processor Enabled : 1
- Runtime Online Capable : 0
-
-[444h 1092 1] Subtable Type : 00 [Processor Local APIC]
-[445h 1093 1] Length : 08
-[446h 1094 1] Processor ID : 83
-[447h 1095 1] Local Apic ID : 83
-[448h 1096 4] Flags (decoded below) : 00000001
- Processor Enabled : 1
- Runtime Online Capable : 0
[snip]
-
-[964h 2404 1] Subtable Type : 01 [I/O APIC]
-[965h 2405 1] Length : 0C
-[966h 2406 1] I/O Apic ID : 00
-[967h 2407 1] Reserved : 00
-[968h 2408 4] Address : FEC00000
-[96Ch 2412 4] Interrupt : 00000000
-
-[970h 2416 1] Subtable Type : 02 [Interrupt Source Override]
-[971h 2417 1] Length : 0A
-[972h 2418 1] Bus : 00
-[973h 2419 1] Source : 00
-[974h 2420 4] Interrupt : 00000002
-[978h 2424 2] Flags (decoded below) : 0000
+[43Ch 1084 1] Subtable Type : 09 [Processor Local x2APIC]
+[43Dh 1085 1] Length : 10
+[43Eh 1086 2] Reserved : 0000
+[440h 1088 4] Processor x2Apic ID : 00000100
+[444h 1092 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[448h 1096 4] Processor UID : 00000082
+
+[44Ch 1100 1] Subtable Type : 09 [Processor Local x2APIC]
+[44Dh 1101 1] Length : 10
+[44Eh 1102 2] Reserved : 0000
+[450h 1104 4] Processor x2Apic ID : 00000101
+[454h 1108 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[458h 1112 4] Processor UID : 00000083
+
[snip]
+
+[C68h 3176 1] Subtable Type : 02 [Interrupt Source Override]
+[C69h 3177 1] Length : 0A
+[C6Ah 3178 1] Bus : 00
+[C6Bh 3179 1] Source : 00
+[C6Ch 3180 4] Interrupt : 00000002
+[C70h 3184 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
-[97Ah 2426 1] Subtable Type : 02 [Interrupt Source Override]
-[97Bh 2427 1] Length : 0A
-[97Ch 2428 1] Bus : 00
-[97Dh 2429 1] Source : 05
-[97Eh 2430 4] Interrupt : 00000005
-[982h 2434 2] Flags (decoded below) : 000D
+[C72h 3186 1] Subtable Type : 02 [Interrupt Source Override]
+[C73h 3187 1] Length : 0A
+[C74h 3188 1] Bus : 00
+[C75h 3189 1] Source : 05
+[C76h 3190 4] Interrupt : 00000005
+[C7Ah 3194 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[984h 2436 1] Subtable Type : 02 [Interrupt Source Override]
-[985h 2437 1] Length : 0A
-[986h 2438 1] Bus : 00
-[987h 2439 1] Source : 09
-[988h 2440 4] Interrupt : 00000009
-[98Ch 2444 2] Flags (decoded below) : 000D
+[C7Ch 3196 1] Subtable Type : 02 [Interrupt Source Override]
+[C7Dh 3197 1] Length : 0A
+[C7Eh 3198 1] Bus : 00
+[C7Fh 3199 1] Source : 09
+[C80h 3200 4] Interrupt : 00000009
+[C84h 3204 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[98Eh 2446 1] Subtable Type : 02 [Interrupt Source Override]
-[98Fh 2447 1] Length : 0A
-[990h 2448 1] Bus : 00
-[991h 2449 1] Source : 0A
-[992h 2450 4] Interrupt : 0000000A
-[996h 2454 2] Flags (decoded below) : 000D
+[C86h 3206 1] Subtable Type : 02 [Interrupt Source Override]
+[C87h 3207 1] Length : 0A
+[C88h 3208 1] Bus : 00
+[C89h 3209 1] Source : 0A
+[C8Ah 3210 4] Interrupt : 0000000A
+[C8Eh 3214 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[998h 2456 1] Subtable Type : 02 [Interrupt Source Override]
-[999h 2457 1] Length : 0A
-[99Ah 2458 1] Bus : 00
-[99Bh 2459 1] Source : 0B
-[99Ch 2460 4] Interrupt : 0000000B
-[9A0h 2464 2] Flags (decoded below) : 000D
+[C90h 3216 1] Subtable Type : 02 [Interrupt Source Override]
+[C91h 3217 1] Length : 0A
+[C92h 3218 1] Bus : 00
+[C93h 3219 1] Source : 0B
+[C94h 3220 4] Interrupt : 0000000B
+[C98h 3224 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[9A2h 2466 1] Subtable Type : 0A [Local x2APIC NMI]
-[9A3h 2467 1] Length : 0C
-[9A4h 2468 2] Flags (decoded below) : 0000
+[C9Ah 3226 1] Subtable Type : 0A [Local x2APIC NMI]
+[C9Bh 3227 1] Length : 0C
+[C9Ch 3228 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
-[9A6h 2470 4] Processor UID : FFFFFFFF
-[9AAh 2474 1] Interrupt Input LINT : 01
-[9ABh 2475 3] Reserved : 000000
+[C9Eh 3230 4] Processor UID : FFFFFFFF
+[CA2h 3234 1] Interrupt Input LINT : 01
+[CA3h 3235 3] Reserved : 000000
...
DSDT:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.core-count2, Wed Aug 23 16:29:51 2023
+ * Disassembly of /tmp/aml-6DDX91, Wed Aug 23 16:29:51 2023
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00007EEF (32495)
+ * Length 0x000083EA (33770)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x52
+ * Checksum 0x01
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -4196,107 +4196,32 @@
}
If ((Arg0 == 0x0101))
{
Notify (C101, Arg1)
}
If ((Arg0 == 0x0102))
{
Notify (C102, Arg1)
}
If ((Arg0 == 0x0103))
{
Notify (C103, Arg1)
}
-
- If ((Arg0 == 0x0104))
- {
- Notify (C104, Arg1)
- }
-
- If ((Arg0 == 0x0105))
- {
- Notify (C105, Arg1)
- }
-
- If ((Arg0 == 0x0106))
- {
- Notify (C106, Arg1)
- }
-
[snip]
- If ((Arg0 == 0x0112))
- {
- Notify (C112, Arg1)
- }
}
Method (CSTA, 1, Serialized)
{
Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF)
\_SB.PCI0.PRES.CSEL = Arg0
Local0 = Zero
If ((\_SB.PCI0.PRES.CPEN == One))
{
Local0 = 0x0F
}
Release (\_SB.PCI0.PRES.CPLK)
Return (Local0)
}
@@ -4306,33 +4231,33 @@
\_SB.PCI0.PRES.CSEL = Arg0
\_SB.PCI0.PRES.CEJ0 = One
Release (\_SB.PCI0.PRES.CPLK)
}
Method (CSCN, 0, Serialized)
{
Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF)
Name (CNEW, Package (0xFF) {})
Local3 = Zero
Local4 = One
While ((Local4 == One))
{
Local4 = Zero
Local0 = One
Local1 = Zero
- While (((Local0 == One) && (Local3 < 0x0113)))
+ While (((Local0 == One) && (Local3 < 0x0104)))
{
Local0 = Zero
\_SB.PCI0.PRES.CSEL = Local3
\_SB.PCI0.PRES.CCMD = Zero
If ((\_SB.PCI0.PRES.CDAT < Local3))
{
Break
}
If ((Local1 == 0xFF))
{
Local4 = One
Break
}
Local3 = \_SB.PCI0.PRES.CDAT
@@ -7220,3281 +7145,3281 @@
Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
{
0x00, 0x08, 0x81, 0x81, 0x01, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x81)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x81, Arg0, Arg1, Arg2)
}
}
- Processor (C082, 0x82, 0x00000000, 0x00)
+ Device (C082)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x82) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0x82))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0x82, 0x82, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x82, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x82)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x82, Arg0, Arg1, Arg2)
}
}
- Processor (C083, 0x83, 0x00000000, 0x00)
+ Device (C083)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x83) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0x83))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0x83, 0x83, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x83)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x83, Arg0, Arg1, Arg2)
}
}
- Processor (C084, 0x84, 0x00000000, 0x00)
+ Device (C084)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x84) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0x84))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0x84, 0x84, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x84, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x84)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x84, Arg0, Arg1, Arg2)
}
}
[snip]
- Processor (C0FE, 0xFE, 0x00000000, 0x00)
+ Device (C0FE)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0xFE) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0xFE))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0xFE, 0xFE, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x7C, 0x01, 0x00, 0x00, // ....|...
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0xFE)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0xFE, Arg0, Arg1, Arg2)
}
}
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-11-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
61ace1d772
tests: bios-tables-test: Add ACPI table binaries for smbios type4 core count test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-Y6WW91, Wed Aug 23 15:43:43 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-FFXW91, Wed Aug 23 15:43:43 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000220
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 3C
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[1D4h 0468 1] Subtable Type : 00 [Processor Local APIC]
+[1D5h 0469 1] Length : 08
+[1D6h 0470 1] Processor ID : 35
+[1D7h 0471 1] Local Apic ID : 6A
+[1D8h 0472 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[1DCh 0476 1] Subtable Type : 01 [I/O APIC]
+[1DDh 0477 1] Length : 0C
+[1DEh 0478 1] I/O Apic ID : 00
+[1DFh 0479 1] Reserved : 00
+[1E0h 0480 4] Address : FEC00000
+[1E4h 0484 4] Interrupt : 00000000
+
+[1E8h 0488 1] Subtable Type : 02 [Interrupt Source Override]
+[1E9h 0489 1] Length : 0A
+[1EAh 0490 1] Bus : 00
+[1EBh 0491 1] Source : 00
+[1ECh 0492 4] Interrupt : 00000002
+[1F0h 0496 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+
+[1F2h 0498 1] Subtable Type : 02 [Interrupt Source Override]
+[1F3h 0499 1] Length : 0A
+[1F4h 0500 1] Bus : 00
+[1F5h 0501 1] Source : 05
+[1F6h 0502 4] Interrupt : 00000005
+[1FAh 0506 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[1FCh 0508 1] Subtable Type : 02 [Interrupt Source Override]
+[1FDh 0509 1] Length : 0A
+[1FEh 0510 1] Bus : 00
+[1FFh 0511 1] Source : 09
+[200h 0512 4] Interrupt : 00000009
+[204h 0516 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[206h 0518 1] Subtable Type : 02 [Interrupt Source Override]
+[207h 0519 1] Length : 0A
+[208h 0520 1] Bus : 00
+[209h 0521 1] Source : 0A
+[20Ah 0522 4] Interrupt : 0000000A
+[20Eh 0526 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[210h 0528 1] Subtable Type : 02 [Interrupt Source Override]
+[211h 0529 1] Length : 0A
+[212h 0530 1] Bus : 00
+[213h 0531 1] Source : 0B
+[214h 0532 4] Interrupt : 0000000B
+[218h 0536 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[21Ah 0538 1] Subtable Type : 04 [Local APIC NMI]
+[21Bh 0539 1] Length : 06
+[21Ch 0540 1] Processor ID : FF
+[21Dh 0541 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[21Fh 0543 1] Interrupt Input LINT : 01
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-9ZXW91, Wed Aug 23 15:43:43 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x00003271 (12913)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0xAF
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
[snip]
+ Device (\_SB.CPUS)
+ {
+ Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID
+ Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID
+ Method (CTFY, 2, NotSerialized)
+ {
+ If ((Arg0 == Zero))
+ {
+ Notify (C000, Arg1)
+ }
+
+ If ((Arg0 == One))
+ {
+ Notify (C001, Arg1)
+ }
[snip]
+ If ((Arg0 == 0x35))
+ {
+ Notify (C035, Arg1)
+ }
+ }
[snip]
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C035, 0x35, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x35))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x35, 0x6A, 0x01, 0x00, 0x00, 0x00 // ..5j....
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x35)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x35, Arg0, Arg1, Arg2)
+ }
+ }
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-8-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
623d26ad9a
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core count test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 1 - 3.
List the ACPI tables that will be added to test the type 4 core count
field.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-6-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
c1cd1d360d
tests: bios-tables-test: Add ACPI table binaries for smbios type4 count test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-W37791, Wed Aug 23 10:36:32 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
+
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-687791, Wed Aug 23 10:36:32 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000430
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : C5
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[3E4h 0996 1] Subtable Type : 00 [Processor Local APIC]
+[3E5h 0997 1] Length : 08
+[3E6h 0998 1] Processor ID : 77
+[3E7h 0999 1] Local Apic ID : 9E
+[3E8h 1000 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+ Runtime Online Capable : 0
+
+[3ECh 1004 1] Subtable Type : 01 [I/O APIC]
+[3EDh 1005 1] Length : 0C
+[3EEh 1006 1] I/O Apic ID : 00
+[3EFh 1007 1] Reserved : 00
+[3F0h 1008 4] Address : FEC00000
+[3F4h 1012 4] Interrupt : 00000000
+
+[3F8h 1016 1] Subtable Type : 02 [Interrupt Source Override]
+[3F9h 1017 1] Length : 0A
+[3FAh 1018 1] Bus : 00
+[3FBh 1019 1] Source : 00
+[3FCh 1020 4] Interrupt : 00000002
+[400h 1024 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+
+[402h 1026 1] Subtable Type : 02 [Interrupt Source Override]
+[403h 1027 1] Length : 0A
+[404h 1028 1] Bus : 00
+[405h 1029 1] Source : 05
+[406h 1030 4] Interrupt : 00000005
+[40Ah 1034 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[40Ch 1036 1] Subtable Type : 02 [Interrupt Source Override]
+[40Dh 1037 1] Length : 0A
+[40Eh 1038 1] Bus : 00
+[40Fh 1039 1] Source : 09
+[410h 1040 4] Interrupt : 00000009
+[414h 1044 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[416h 1046 1] Subtable Type : 02 [Interrupt Source Override]
+[417h 1047 1] Length : 0A
+[418h 1048 1] Bus : 00
+[419h 1049 1] Source : 0A
+[41Ah 1050 4] Interrupt : 0000000A
+[41Eh 1054 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[420h 1056 1] Subtable Type : 02 [Interrupt Source Override]
+[421h 1057 1] Length : 0A
+[422h 1058 1] Bus : 00
+[423h 1059 1] Source : 0B
+[424h 1060 4] Interrupt : 0000000B
+[428h 1064 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[42Ah 1066 1] Subtable Type : 04 [Local APIC NMI]
+[42Bh 1067 1] Length : 06
+[42Ch 1068 1] Processor ID : FF
+[42Dh 1069 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[42Fh 1071 1] Interrupt Input LINT : 01
+
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-8G8791, Wed Aug 23 10:36:32 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x0000489D (18589)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0xDB
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
+
[snip]
+
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C077, 0x77, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x77))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x77, 0x9E, 0x01, 0x00, 0x00, 0x00 // ..w.....
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x77)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x77, Arg0, Arg1, Arg2)
+ }
+ }
+ }
+ }
+
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-5-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Zhao Liu
6c7937ece9
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 count test
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 1 - 3.
List the ACPI tables that will be added to test the type 4 count.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-3-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07 03:39:11 -05:00
Jonathan Cameron
e0c7245255
tests/acpi: Update DSDT.cxl with QTG DSM
...
Description of change in previous patch.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20231012125623.21101-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-10-22 05:18:17 -04:00
Gerd Hoffmann
c1774bdb11
tests/acpi: update expected data files
...
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Granularity
0x08000000, // Range Minimum
0xAFFFFFFF, // Range Maximum
0x00000000, // Translation Offset
0xA8000000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Granularity
0xC0000000, // Range Minimum
0xFEBFFFFF, // Range Maximum
0x00000000, // Translation Offset
0x3EC00000, // Length
,, , AddressRangeMemory, TypeStatic)
QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x0000000000000000, // Granularity
- 0x0000000200000000, // Range Minimum
- 0x00000009FFFFFFFF, // Range Maximum
+ 0x000000FF00000000, // Range Minimum
+ 0x00000106FFFFFFFF, // Range Maximum
0x0000000000000000, // Translation Offset
0x0000000800000000, // Length
,, , AddressRangeMemory, TypeStatic)
})
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-10-10 11:11:37 +02:00
Igor Mammedov
e3c79cf3ef
tests: acpi: update expected blobs
...
Expected change is that _ADR object is removed from
hostbridge descriptor in DSDT for PC and Q35 machines.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230720133858.1974024-7-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-08-03 16:06:49 -04:00
Igor Mammedov
6e510855a9
tests: acpi: x86: update expected blobs
...
Following change is expected on each PCI slot with enabled
ACPI PCI hotplug
- BSEL,
- ASUN
+ Zero,
+ Zero
}
+ Local0 [Zero] = BSEL /* \_SB_.PCI0.BSEL */
+ Local0 [One] = ASUN /* \_SB_.PCI0.S18_.ASUN */
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230720133858.1974024-4-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-08-03 16:06:49 -04:00
Ani Sinha
bac4711b07
tests/acpi/bios-tables-test: update acpi blob q35/DSDT.noacpihp
...
Some fixes were committed in bios-tables-test in the previous commit. Update
the acpi blob and clear bios-tables-test-allowed-diff.h so that the test
continues to pass with the changes in the bios-tables-test.
Following is the asl diff between the old and the newly updated blob:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20210604 (64-bit version)
* Copyright (c) 2000 - 2021 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.noacpihp, Wed Jun 21 18:26:52 2023
+ * Disassembly of /tmp/aml-O8SU61, Wed Jun 21 18:26:52 2023
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002038 (8248)
+ * Length 0x00002031 (8241)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x4A
+ * Checksum 0x89
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3148,48 +3148,48 @@
{
Name (_ADR, Zero) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x01F5
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
}
Device (S40)
{
Name (_ADR, 0x00080000) // _ADR: Address
- Device (S41)
+ Device (S01)
{
- Name (_ADR, 0x00080001) // _ADR: Address
+ Name (_ADR, One) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x0259
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
- Device (S48)
+ Device (S02)
{
- Name (_ADR, 0x00090000) // _ADR: Address
+ Name (_ADR, 0x02) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
}
}
Device (SF8)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
Scope (\_SB)
{
Field (PCI0.SF8.PIRQ, ByteAcc, NoLock, Preserve)
{
PRQA, 8,
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230705115925.5339-4-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-07-10 18:59:32 -04:00
Michael S. Tsirkin
c85cad8105
tests/data/acpi: update after SMBIOS 2.0 change
...
Switching to SMBIOS3.0 by default shifts some addresses, so we get this
change in tests/data/acpi/q35/SSDT.dimmpxm :
@@ -389,6 +389,6 @@
}
}
- Name (MEMA, 0x07FFE000)
+ Name (MEMA, 0x07FFF000)
}
update the expected file to match.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-06-26 09:50:00 -04:00
Eric DeVolder
1141159cb4
ACPI: bios-tables-test.c step 5 (update expected table binaries)
...
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
An examination of all the files impacted (as listed in
bios-tables-test-allowe-diff.h) shows only the MADT/APIC tables
bumping revision from 1 to 3, and a corresponding change to
the checksum. The below diff is typical:
--- /tmp/asl-1F9641.dsl 2023-05-16 15:18:31.292579156 -0400
+++ /tmp/asl-GVD741.dsl 2023-05-16 15:18:31.291579149 -0400
@@ -1,32 +1,32 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230331 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Tue May 16 15:18:31 2023
+ * Disassembly of /tmp/aml-R4D741, Tue May 16 15:18:31 2023
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 004h] Table Length : 00000078
-[008h 0008 001h] Revision : 01
-[009h 0009 001h] Checksum : 8A
+[008h 0008 001h] Revision : 03
+[009h 0009 001h] Checksum : 88
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 004h] Local Apic Address : FEE00000
[028h 0040 004h] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 001h] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 001h] Length : 08
[02Eh 0046 001h] Processor ID : 00
[02Fh 0047 001h] Local Apic ID : 00
[030h 0048 004h] Flags (decoded below) : 00000001
Processor Enabled : 1
@@ -81,24 +81,24 @@
[06Bh 0107 001h] Source : 0B
[06Ch 0108 004h] Interrupt : 0000000B
[070h 0112 002h] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[072h 0114 001h] Subtable Type : 04 [Local APIC NMI]
[073h 0115 001h] Length : 06
[074h 0116 001h] Processor ID : FF
[075h 0117 002h] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[077h 0119 001h] Interrupt Input LINT : 01
Raw Table Data: Length 120 (0x78)
- 0000: 41 50 49 43 78 00 00 00 01 8A 42 4F 43 48 53 20 // APICx.....BOCHS
+ 0000: 41 50 49 43 78 00 00 00 03 88 42 4F 43 48 53 20 // APICx.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................
0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................
0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................
0070: 0D 00 04 06 FF 00 00 01 // ........
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
Message-Id: <20230517162545.2191-4-eric.devolder@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Ani Sinha <anisinha@redhat.com>
2023-05-19 01:36:09 -04:00
Igor Mammedov
0a7044eb64
tests: acpi: update expected blobs
...
an extra devices at non-zero function address with static
_DSM method get exposed, ex:
+ Device (S15)
+ {
+ Name (_ADR, 0x00020005) // _ADR: Address
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x01)
+ {
+ 0x66
+ }
+ Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-29-imammedo@redhat.com>
2023-03-07 12:39:00 -05:00
Igor Mammedov
05041d20d7
tests: acpi: update expected blobs
...
in PC machine case piix3-ide and PIIX4_PM get exposed
+ Device (S09)
+ {
+ Name (_ADR, 0x00010001) // _ADR: Address
+ }
+
+ Device (S0B)
+ {
+ Name (_ADR, 0x00010003) // _ADR: Address
+ }
in q35 machine case ich9-ahci gets exposed
+ Device (SFA)
+ {
+ Name (_ADR, 0x001F0002) // _ADR: Address
+ }
and addtional pci-testdev, virtio-balloon exposed in q35 multi-bridge test case
+ Device (S14)
+ {
+ Name (_ADR, 0x00020004) // _ADR: Address
+ }
+
...
+ Device (S22)
+ {
+ Name (_ADR, 0x00040002) // _ADR: Address
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-26-imammedo@redhat.com>
2023-03-07 12:39:00 -05:00
Igor Mammedov
f8e49d067f
tests: acpi: update expected blobs
...
the only chenge is addition of _DSM- > EDSM method
on non-hotpluggable devices with configured acpi-index.
Something like:
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x01)
+ {
+ 0x65
+ }
+ Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-23-imammedo@redhat.com>
2023-03-07 12:39:00 -05:00
Igor Mammedov
bda649537c
tests: acpi: update expected blobs
...
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-19-imammedo@redhat.com>
2023-03-07 12:39:00 -05:00
Igor Mammedov
e9ea452237
tests: acpi: update expected blobs
...
only following context change:
- Local1 = Zero
If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
Return (Local0)
...
Return (Local0)
}
+ Local1 = Zero
Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-16-imammedo@redhat.com>
2023-03-07 12:39:00 -05:00
Igor Mammedov
30216b3eaf
tests: acpi: update expected blobs
...
BNUM numbering changes across DSDT due to addition of new bridges.
Fixed missing PCI tree brunch (q35/DSDT.multi-bridge case):
// -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off
+ Device (S50)
+ {
+ Name (_ADR, 0x000A0000) // _ADR: Address
// -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (BSEL, Zero)
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (ASUN, Zero)
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x02)
+ {
+ BSEL,
+ ASUN
+ }
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
+
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
+ {
+ PCEJ (BSEL, _SUN)
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+ }
+ }
Fixed hotplug notification for leaf root port (hotplug=on) attached to
intermediate root port (hotplug=off) (q35/DSDT.multi-bridge case)
// -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off
+ Scope (S50)
+ {
// -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp
+ Scope (S00)
+ {
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ ^S00.PCNT ()
+ }
+ }
...
Method (PCNT, 0, NotSerialized)
{
+ ^S50.PCNT ()
^S13.PCNT ()
Populated slots being described on coldplugged bridges even if
ACPI bridge hotplug is disabled.
(pc/DSDT.hpbridge and pc/DSDT.hpbrroot)
...
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
+ Device (S08)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ }
+
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
}
...
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-11-imammedo@redhat.com>
2023-03-07 12:38:59 -05:00
Igor Mammedov
6bf2d446d4
tests: acpi: update expected blobs
...
expected changes:
Basically adds devices present on root bus in form:
Device (SXX)
{
Name (_ADR, 0xYYYYYYYY) // _ADR: Address
}
On top of that For q35.noacpihp, all ACPI PCI hotplug
AML is removed and _OSC get native hotplug enabled:
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- Local0 &= 0x1E
+ Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-5-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-03-07 12:38:59 -05:00
Igor Mammedov
d3860a57c7
tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot
...
for q35.noacpihp use plain default Q35 DSDT table as a starting point.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-3-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-03-07 12:38:59 -05:00
Jonathan Cameron
21063bcee8
tests: acpi: Update q35/DSDT.cxl for removed duplicate UID
...
Dropping the ID effects this table in trivial fashion.
Reviewed-by: Gregory Price <gregory.price@memverge.com>
Tested-by: Gregory Price <gregory.price@memverge.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230206172816.8201-8-Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-03-02 19:13:52 -05:00
Igor Mammedov
beb680ff28
tests: acpi: update expected blobs
...
expected change is removal of dynamic _DSM bits from slots populated
by coldplugged bridges (something like):
- Scope (S18)
- {
- Name (ASUN, 0x03)
- Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
- {
- Local0 = Package (0x02)
- {
- BSEL,
- ASUN
- }
- Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
- }
- }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230112140312.3096331-38-imammedo@redhat.com>
2023-01-28 06:21:30 -05:00
Igor Mammedov
912a5cf142
tests: acpi: update expected blobs
...
Expected change for non-populated slots is that
thay are moved after non-hotpluggable PCI tree description.
And expected change for hotplug capable populated slots is:
- ...
+ Name (BSEL, 0x03)
+ Scope (S00)
+ {
+ Name (ASUN, Zero)
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x02)
+ {
+ BSEL,
+ ASUN
+ }
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
[ ... other hotplug depended bits ]
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230112140312.3096331-35-imammedo@redhat.com>
2023-01-28 06:21:29 -05:00
Igor Mammedov
65e414a9dd
tests: acpi: update expected blobs
...
previous commit added endpoint devices to bridge testcases,
which exposes extra non-hotpluggable slot in DSDT on bus where
hotplug is not available.
It should look like this (numbers may vary):
+ Device (S28)
+ {
+ Name (_ADR, 0x00050000) // _ADR: Address
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230112140312.3096331-27-imammedo@redhat.com>
2023-01-28 06:21:29 -05:00
Igor Mammedov
15dcfb197e
tests: acpi: update expected blobs
...
Expected changes:
* pc/bridge testcase due to
("pcihp: compose PCNT callchain right before its user _GPE._E01")
...
+ Scope (\_SB.PCI0)
+ {
+ Scope (S18)
+ {
+ Scope (S08)
+ {
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = 0x02
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
Method (PCNT, 0, NotSerialized)
{
- BNUM = Zero
+ BNUM = One
DVNT (PCIU, One)
DVNT (PCID, 0x03)
- ^S18.PCNT ()
+ ^S08.PCNT ()
}
}
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ ^S18.PCNT ()
+ }
}
Scope (_GPE)
* due to ("pcihp: do not put empty PCNT in DSDT") in the most Q35 tests
...
{
Name (_ADR, 0x001F0003) // _ADR: Address
}
-
- Method (PCNT, 0, NotSerialized)
- {
- }
}
}
...
{
Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE
{
- Acquire (\_SB.PCI0.BLCK, 0xFFFF)
- \_SB.PCI0.PCNT ()
- Release (\_SB.PCI0.BLCK)
}
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230112140312.3096331-24-imammedo@redhat.com>
2023-01-28 06:21:29 -05:00
Igor Mammedov
48dde093d3
tests: acpi: update expected blobs
...
add extra nested bridges/root ports to blobs so it would be
posible to check how follow up patches would affect it.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230112140312.3096331-6-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28 06:21:29 -05:00
Igor Mammedov
83afb1409f
tests: acpi: x86: update expected DSDT after moving PRQx fields in _SB scope
...
Expected DSDT changes,
pc:
- Field (P40C, ByteAcc, NoLock, Preserve)
+ Scope (\_SB)
{
- PRQ0, 8,
- PRQ1, 8,
- PRQ2, 8,
- PRQ3, 8
+ Field (PCI0.S08.P40C, ByteAcc, NoLock, Preserve)
+ {
+ PRQ0, 8,
+ PRQ1, 8,
+ PRQ2, 8,
+ PRQ3, 8
+ }
}
- Alias (PRQ0, \_SB.PRQ0)
- Alias (PRQ1, \_SB.PRQ1)
- Alias (PRQ2, \_SB.PRQ2)
- Alias (PRQ3, \_SB.PRQ3)
q35:
- Field (PIRQ, ByteAcc, NoLock, Preserve)
- {
- PRQA, 8,
- PRQB, 8,
- PRQC, 8,
- PRQD, 8,
- Offset (0x08),
- PRQE, 8,
- PRQF, 8,
- PRQG, 8,
- PRQH, 8
+ Scope (\_SB)
+ {
+ Field (PCI0.SF8.PIRQ, ByteAcc, NoLock, Preserve)
+ {
+ PRQA, 8,
+ PRQB, 8,
+ PRQC, 8,
+ PRQD, 8,
+ Offset (0x08),
+ PRQE, 8,
+ PRQF, 8,
+ PRQG, 8,
+ PRQH, 8
+ }
}
- Alias (PRQA, \_SB.PRQA)
- Alias (PRQB, \_SB.PRQB)
- Alias (PRQC, \_SB.PRQC)
- Alias (PRQD, \_SB.PRQD)
- Alias (PRQE, \_SB.PRQE)
- Alias (PRQF, \_SB.PRQF)
- Alias (PRQG, \_SB.PRQG)
- Alias (PRQH, \_SB.PRQH)
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221121153613.3972225-4-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-22 05:19:00 -05:00
Julia Suvorova
b22fbc5bcb
tests/acpi: update tables for new core count test
...
Changes in the tables (for 275 cores):
FACP:
+ Use APIC Cluster Model (V4) : 1
APIC:
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
...
+
+[81Ch 2076 1] Subtable Type : 00 [Processor Local APIC]
+[81Dh 2077 1] Length : 08
+[81Eh 2078 1] Processor ID : FE
+[81Fh 2079 1] Local Apic ID : FE
+[820h 2080 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[824h 2084 1] Subtable Type : 09 [Processor Local x2APIC]
+[825h 2085 1] Length : 10
+[826h 2086 2] Reserved : 0000
+[828h 2088 4] Processor x2Apic ID : 000000FF
+[82Ch 2092 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[830h 2096 4] Processor UID : 000000FF
...
DSDT:
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
...
+ Processor (C0FE, 0xFE, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0xFE))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0xFE, 0xFE, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0xFE)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0xFE, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Device (C0FF)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0xFF) // _UID: Unique ID
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0xFF))
+ }
+
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
+ {
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0xFF)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0xFF, Arg0, Arg1, Arg2)
+ }
+ }
+
...
Signed-off-by: Julia Suvorova <jusual@redhat.com>
Message-Id: <20220731162141.178443-6-jusual@redhat.com>
Message-Id: <20221011111731.101412-6-jusual@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-07 14:08:18 -05:00
Julia Suvorova
159a0da5b0
tests/acpi: allow changes for core_count2 test
...
Signed-off-by: Julia Suvorova <jusual@redhat.com>
Message-Id: <20220731162141.178443-4-jusual@redhat.com>
Message-Id: <20221011111731.101412-4-jusual@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
2022-11-07 14:08:18 -05:00
Brice Goglin
84c35b5ff2
tests: acpi: q35: update expected blobs *.hmat-noinitiators expected HMAT:
...
[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table]
[004h 0004 4] Table Length : 00000120
[008h 0008 1] Revision : 02
[009h 0009 1] Checksum : 4F
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Reserved : 00000000
[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[02Ah 0042 2] Reserved : 0000
[02Ch 0044 4] Length : 00000028
[030h 0048 2] Flags (decoded below) : 0001
Processor Proximity Domain Valid : 1
[032h 0050 2] Reserved1 : 0000
[034h 0052 4] Attached Initiator Proximity Domain : 00000000
[038h 0056 4] Memory Proximity Domain : 00000000
[03Ch 0060 4] Reserved2 : 00000000
[040h 0064 8] Reserved3 : 0000000000000000
[048h 0072 8] Reserved4 : 0000000000000000
[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[052h 0082 2] Reserved : 0000
[054h 0084 4] Length : 00000028
[058h 0088 2] Flags (decoded below) : 0001
Processor Proximity Domain Valid : 1
[05Ah 0090 2] Reserved1 : 0000
[05Ch 0092 4] Attached Initiator Proximity Domain : 00000001
[060h 0096 4] Memory Proximity Domain : 00000001
[064h 0100 4] Reserved2 : 00000000
[068h 0104 8] Reserved3 : 0000000000000000
[070h 0112 8] Reserved4 : 0000000000000000
[078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes]
[07Ah 0122 2] Reserved : 0000
[07Ch 0124 4] Length : 00000028
[080h 0128 2] Flags (decoded below) : 0000
Processor Proximity Domain Valid : 0
[082h 0130 2] Reserved1 : 0000
[084h 0132 4] Attached Initiator Proximity Domain : 00000080
[088h 0136 4] Memory Proximity Domain : 00000002
[08Ch 0140 4] Reserved2 : 00000000
[090h 0144 8] Reserved3 : 0000000000000000
[098h 0152 8] Reserved4 : 0000000000000000
[0A0h 0160 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information]
[0A2h 0162 2] Reserved : 0000
[0A4h 0164 4] Length : 00000040
[0A8h 0168 1] Flags (decoded below) : 00
Memory Hierarchy : 0
[0A9h 0169 1] Data Type : 00
[0AAh 0170 2] Reserved1 : 0000
[0ACh 0172 4] Initiator Proximity Domains # : 00000002
[0B0h 0176 4] Target Proximity Domains # : 00000003
[0B4h 0180 4] Reserved2 : 00000000
[0B8h 0184 8] Entry Base Unit : 0000000000002710
[0C0h 0192 4] Initiator Proximity Domain List : 00000000
[0C4h 0196 4] Initiator Proximity Domain List : 00000001
[0C8h 0200 4] Target Proximity Domain List : 00000000
[0CCh 0204 4] Target Proximity Domain List : 00000001
[0D0h 0208 4] Target Proximity Domain List : 00000002
[0D4h 0212 2] Entry : 0001
[0D6h 0214 2] Entry : 0002
[0D8h 0216 2] Entry : 0003
[0DAh 0218 2] Entry : 0002
[0DCh 0220 2] Entry : 0001
[0DEh 0222 2] Entry : 0003
[0E0h 0224 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information]
[0E2h 0226 2] Reserved : 0000
[0E4h 0228 4] Length : 00000040
[0E8h 0232 1] Flags (decoded below) : 00
Memory Hierarchy : 0
[0E9h 0233 1] Data Type : 03
[0EAh 0234 2] Reserved1 : 0000
[0ECh 0236 4] Initiator Proximity Domains # : 00000002
[0F0h 0240 4] Target Proximity Domains # : 00000003
[0F4h 0244 4] Reserved2 : 00000000
[0F8h 0248 8] Entry Base Unit : 0000000000000001
[100h 0256 4] Initiator Proximity Domain List : 00000000
[104h 0260 4] Initiator Proximity Domain List : 00000001
[108h 0264 4] Target Proximity Domain List : 00000000
[10Ch 0268 4] Target Proximity Domain List : 00000001
[110h 0272 4] Target Proximity Domain List : 00000002
[114h 0276 2] Entry : 000A
[116h 0278 2] Entry : 0005
[118h 0280 2] Entry : 0001
[11Ah 0282 2] Entry : 0005
[11Ch 0284 2] Entry : 000A
[11Eh 0286 2] Entry : 0001
Raw Table Data: Length 288 (0x120)
0000: 48 4D 41 54 20 01 00 00 02 4F 42 4F 43 48 53 20 // HMAT ....OBOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(...
0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0050: 00 00 00 00 28 00 00 00 01 00 00 00 01 00 00 00 // ....(...........
0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0070: 00 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(...
0080: 00 00 00 00 80 00 00 00 02 00 00 00 00 00 00 00 // ................
0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00A0: 01 00 00 00 40 00 00 00 00 00 00 00 02 00 00 00 // ....@...........
00B0: 03 00 00 00 00 00 00 00 10 27 00 00 00 00 00 00 // .........'......
00C0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................
00D0: 02 00 00 00 01 00 02 00 03 00 02 00 01 00 03 00 // ................
00E0: 01 00 00 00 40 00 00 00 00 03 00 00 02 00 00 00 // ....@...........
00F0: 03 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 // ................
0100: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................
0110: 02 00 00 00 0A 00 05 00 01 00 05 00 0A 00 01 00 // ................
Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com>
Message-Id: <20221027100037.251-5-hesham.almatary@huawei.com>
Tested-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-07 14:08:17 -05:00
Brice Goglin
e7cb1ce249
tests: acpi: add and whitelist *.hmat-noinitiator expected blobs
...
.. which will be used by follow up hmat-noinitiator test-case.
Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com>
Message-Id: <20221027100037.251-3-hesham.almatary@huawei.com>
Tested-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-07 14:08:17 -05:00
Igor Mammedov
0193d693a9
tests: acpi: update expected blobs
...
Expected changes are:
1) Moving _GPE scope declaration achec of all _E0x methods
+ Scope (_GPE)
+ {
+ Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID
+ }
+
Scope (_SB)
{
Device (\_SB.PCI0.PRES)
============
\_SB.CPUS.CSCN ()
}
- Scope (_GPE)
- {
- Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID
- }
2) Moving _E01 handler after PCI0 scope is defined
- Scope (_GPE)
- {
- Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID
- Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE
- {
- Acquire (\_SB.PCI0.BLCK, 0xFFFF)
- \_SB.PCI0.PCNT ()
- Release (\_SB.PCI0.BLCK)
- }
- }
-
Scope (\_SB.PCI0)
{
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
=============
}
}
}
+
+ Scope (_GPE)
+ {
+ Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE
+ {
+ Acquire (\_SB.PCI0.BLCK, 0xFFFF)
+ \_SB.PCI0.PCNT ()
+ Release (\_SB.PCI0.BLCK)
+ }
+ }
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221017102146.2254096-12-imammedo@redhat.com>
2022-11-07 14:08:17 -05:00
Igor Mammedov
5aaa1e1006
tests: acpi: update expected blobs
...
Expected change in q35 tests:
@@ -2797,14 +2797,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
}
}
- Scope (_SB.PCI0)
- {
- Device (SMB0)
- {
- Name (_ADR, 0x001F0003) // _ADR: Address
- }
- }
-
Scope (_SB)
{
Device (HPET)
@@ -3282,6 +3274,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
}
}
+ Device (SFB)
+ {
+ Name (_ADR, 0x001F0003) // _ADR: Address
+ }
+
Method (PCNT, 0, NotSerialized)
{
}
Also for ipmismbus test, child 'Device (MI1)' of SMB0 will be moved along with it
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221017102146.2254096-9-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-07 14:08:17 -05:00
Igor Mammedov
fd4f2ae8ec
tests: acpi: update expected DSDT after ISA bridge is moved directly under PCI host bridge
...
example of the change for PC machine with hotplug disabled on root buss (no BSEL case):
- Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve)
+ Field (S08.P40C, ByteAcc, NoLock, Preserve)
===
- Scope (_SB.PCI0)
- {
- Device (ISA)
- {
- Name (_ADR, 0x00010000) // _ADR: Address
- OperationRegion (P40C, PCI_Config, 0x60, 0x04)
...
- }
- }
-
Scope (_SB)
===
+ Device (S08)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ OperationRegion (P40C, PCI_Config, 0x60, 0x04)
...
+ }
+
Device (S10)
{
Name (_ADR, 0x00020000) // _ADR: Address
with hotplug enabled on root bus (i.e. bus has BSEL configured),
a following addtional entries will be seen:
+ Name (ASUN, One)
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x02)
+ {
+ BSEL,
+ ASUN
+ }
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
similar changes are expected for Q35 modulo:
- Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve)
+ Field (SF8.PIRQ, ByteAcc, NoLock, Preserve)
and bridge address
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221017102146.2254096-5-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-07 14:08:17 -05:00
Robert Hoo
a023c4b2e7
test/acpi/bios-tables-test: SSDT: update golden master binaries
...
And empty bios-tables-test-allowed-diff.h.
Diff of ASL form, from qtest testlog.txt:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180629 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/SSDT.dimmpxm, Thu Sep 22 18:25:06 2022
+ * Disassembly of /tmp/aml-YYZZS1, Thu Sep 22 18:25:06 2022
*
* Original Table Header:
* Signature "SSDT"
- * Length 0x000002DE (734)
+ * Length 0x00000717 (1815)
* Revision 0x01
- * Checksum 0x56
+ * Checksum 0xBC
* OEM ID "BOCHS "
* OEM Table ID "NVDIMM"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
{
Scope (\_SB)
{
Device (NVDR)
{
Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID: Hardware ID
Method (NCAL, 5, Serialized)
{
Local6 = MEMA /* \MEMA */
@@ -49,52 +49,52 @@
ODAT, 32736
}
If ((Arg4 == Zero))
{
Local0 = ToUUID ("2f10e7a4-9e91-11e4-89d3-123b93f75cba")
}
ElseIf ((Arg4 == 0x00010000))
{
Local0 = ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62")
}
Else
{
Local0 = ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66")
}
- If (((Local6 == Zero) | (Arg0 != Local0)))
+ If (((Local6 == Zero) || (Arg0 != Local0)))
{
If ((Arg2 == Zero))
{
Return (Buffer (One)
{
0x00 // .
})
}
Return (Buffer (One)
{
0x01 // .
})
}
HDLE = Arg4
REVS = Arg1
FUNC = Arg2
- If (((ObjectType (Arg3) == 0x04) & (SizeOf (Arg3) == One)))
+ If (((ObjectType (Arg3) == 0x04) && (SizeOf (Arg3) == One)))
{
Local2 = Arg3 [Zero]
Local3 = DerefOf (Local2)
FARG = Local3
}
NTFI = Local6
Local1 = (RLEN - 0x04)
If ((Local1 < 0x08))
{
Local2 = Zero
Name (TBUF, Buffer (One)
{
0x00 // .
})
Local7 = Buffer (Zero){}
@@ -161,45 +161,234 @@
Else
{
If ((Local1 == Zero))
{
Return (Local2)
}
Local3 += Local1
Concatenate (Local2, Local0, Local2)
}
}
}
Device (NV00)
{
Name (_ADR, One) // _ADR: Address
+ Method (_LSI, 0, Serialized) // _LSI: Label Storage Information
+ {
+ Local0 = NCAL (ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66"), One, 0x04, Zero, One)
+ CreateDWordField (Local0, Zero, STTS)
+ CreateDWordField (Local0, 0x04, SLSA)
+ CreateDWordField (Local0, 0x08, MAXT)
+ Local1 = Package (0x03)
+ {
+ STTS,
+ SLSA,
+ MAXT
+ }
+ Return (Local1)
+ }
+
+ Method (_LSR, 2, Serialized) // _LSR: Label Storage Read
+ {
+ Name (INPT, Buffer (0x08)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........
+ })
+ CreateDWordField (INPT, Zero, OFST)
+ CreateDWordField (INPT, 0x04, LEN)
+ OFST = Arg0
+ LEN = Arg1
+ Local0 = Package (0x01)
+ {
+ INPT
+ }
+ Local3 = NCAL (ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66"), One, 0x05, Local0, One)
+ CreateDWordField (Local3, Zero, STTS)
+ CreateField (Local3, 0x20, (LEN << 0x03), LDAT)
+ Name (LSA, Buffer (Zero){})
+ ToBuffer (LDAT, LSA) /* \_SB_.NVDR.NV00._LSR.LSA_ */
+ Local1 = Package (0x02)
+ {
+ STTS,
+ LSA
+ }
+ Return (Local1)
+ }
+
+ Method (_LSW, 3, Serialized) // _LSW: Label Storage Write
+ {
+ Local2 = Arg2
+ Name (INPT, Buffer (0x08)
+ {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........
+ })
+ CreateDWordField (INPT, Zero, OFST)
+ CreateDWordField (INPT, 0x04, TLEN)
+ OFST = Arg0
+ TLEN = Arg1
+ Concatenate (INPT, Local2, INPT) /* \_SB_.NVDR.NV00._LSW.INPT */
+ Local0 = Package (0x01)
+ {
+ INPT
+ }
+ Local3 = NCAL (ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66"), One, 0x06, Local0, One)
+ CreateDWordField (Local3, Zero, STTS)
+ Return (STTS) /* \_SB_.NVDR.NV00._LSW.STTS */
+ }
+
(iterates in each NV)
Message-Id: <20220922122155.1326543-6-robert.hu@linux.intel.com>
Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-02 06:56:32 -04:00
Igor Mammedov
1ccd222094
tests: acpi: update expected blobs
...
Expected change:
+ Device (SE8)
+ {
+ Name (_ADR, 0x001D0000) // _ADR: Address
+ Name (ASUN, 0x1D)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x02)
{
BSEL,
ASUN
}
Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
- }
- Device (SE8)
- {
- Name (_ADR, 0x001D0000) // _ADR: Address
- Name (ASUN, 0x1D)
Name (_SUN, 0x1D) // _SUN: Slot User Number
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220701133515.137890-17-imammedo@redhat.com>
2022-10-09 16:38:46 -04:00
Igor Mammedov
3c99559269
tests: acpi: update expected blobs
...
Expected change:
- Name (_SUN, 0x0X) // _SUN: Slot User Number
Name (_ADR, 0xY) // _ADR: Address
...
+ Name (_SUN, 0xX) // _SUN: Slot User Number
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220701133515.137890-14-imammedo@redhat.com>
2022-10-09 16:38:46 -04:00
Igor Mammedov
0176649070
tests: acpi: update expected blobs
...
It's expected that hotpluggable slots will, get ASUN variable
and use that instead of _SUN with its _DSM method.
For example:
@@ -979,8 +979,9 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Device (S18)
{
- Name (_SUN, 0x03) // _SUN: Slot User Number
+ Name (ASUN, 0x03)
Name (_ADR, 0x00030000) // _ADR: Address
+ Name (_SUN, 0x03) // _SUN: Slot User Number
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
@@ -991,7 +992,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Local0 = Package (0x02)
{
BSEL,
- _SUN
+ ASUN
}
Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220701133515.137890-11-imammedo@redhat.com>
2022-10-09 16:38:45 -04:00
Igor Mammedov
13508ea26a
tests: acpi: update expected blobs
...
An intermediate blobs update to keep changes (last 2 patches)
reviewable.
Includes refactored PDSM that uses Package argument for custom
parameters.
===== PDSM taking package as arguments
Return (Local0)
}
- Method (PDSM, 6, Serialized)
+ Method (PDSM, 5, Serialized)
{
- If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ If ((Arg2 == Zero))
{
- Local0 = AIDX (Arg4, Arg5)
- If ((Arg2 == Zero))
- {
- If ((Arg1 == 0x02))
+ Local0 = Buffer (One)
{
- If (!((Local0 == Zero) | (Local0 == 0xFFFFFFFF)))
- {
- Return (Buffer (One)
- {
- 0x81 // .
- })
- }
+ 0x00 // .
}
+ Local1 = Zero
+ If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ {
+ Return (Local0)
+ }
- Return (Buffer (One)
- {
- 0x00 // .
- })
+ If ((Arg1 < 0x02))
+ {
+ Return (Local0)
}
- ElseIf ((Arg2 == 0x07))
+
+ Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
+ ))
+ If (!((Local2 == Zero) | (Local2 == 0xFFFFFFFF)))
{
- Local1 = Package (0x02)
- {
- Zero,
- ""
- }
- Local1 [Zero] = Local0
- Return (Local1)
+ Local1 |= One
+ Local1 |= (One << 0x07)
}
+
+ Local0 [Zero] = Local1
+ Return (Local0)
+ }
+
+ If ((Arg2 == 0x07))
+ {
+ Local0 = Package (0x02)
+ {
+ Zero,
+ ""
+ }
+ Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
+ ))
+ Local0 [Zero] = Local2
+ Return (Local0)
}
}
}
===== PCI slot using Package to pass arguments to _DSM
Name (ASUN, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
- Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, ASUN))
+ Local0 = Package (0x02)
+ {
+ BSEL,
+ ASUN
+ }
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
===== hotpluggable PCI slot using Package to pass arguments to _DSM
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
- Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+ Local0 = Package (0x02)
+ {
+ BSEL,
+ _SUN
+ }
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220701133515.137890-8-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-09 16:38:45 -04:00
Igor Mammedov
4609296d06
tests: acpi: update expected blobs after HPET move
...
HPET AML moved after PCI host bridge description (no functional change)
diff example for PC machine:
@@ -54,47 +54,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
}
}
- Scope (_SB)
- {
- Device (HPET)
- {
- Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
- Name (_UID, Zero) // _UID: Unique ID
- OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400)
- Field (HPTM, DWordAcc, Lock, Preserve)
- {
- VEND, 32,
- PRD, 32
- }
-
- Method (_STA, 0, NotSerialized) // _STA: Status
- {
- Local0 = VEND /* \_SB_.HPET.VEND */
- Local1 = PRD /* \_SB_.HPET.PRD_ */
- Local0 >>= 0x10
- If (((Local0 == Zero) || (Local0 == 0xFFFF)))
- {
- Return (Zero)
- }
-
- If (((Local1 == Zero) || (Local1 > 0x05F5E100)))
- {
- Return (Zero)
- }
-
- Return (0x0F)
- }
-
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadOnly,
- 0xFED00000, // Address Base
- 0x00000400, // Address Length
- )
- })
- }
- }
-
Scope (_SB.PCI0)
{
Device (ISA)
@@ -529,6 +488,47 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
}
}
+ Scope (_SB)
+ {
+ Device (HPET)
+ {
+ Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400)
+ Field (HPTM, DWordAcc, Lock, Preserve)
+ {
+ VEND, 32,
+ PRD, 32
+ }
+
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ Local0 = VEND /* \_SB_.HPET.VEND */
+ Local1 = PRD /* \_SB_.HPET.PRD_ */
+ Local0 >>= 0x10
+ If (((Local0 == Zero) || (Local0 == 0xFFFF)))
+ {
+ Return (Zero)
+ }
+
+ If (((Local1 == Zero) || (Local1 > 0x05F5E100)))
+ {
+ Return (Zero)
+ }
+
+ Return (0x0F)
+ }
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadOnly,
+ 0xFED00000, // Address Base
+ 0x00000400, // Address Length
+ )
+ })
+ }
+ }
+
Scope (_SB)
{
Device (\_SB.PCI0.PRES)
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220701133515.137890-4-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-09 16:38:45 -04:00
Mark Cave-Ayland
5060004c30
tests/acpi: virt: update golden masters for VIOT
...
Differences between disassembled ASL files for VIOT:
+++ /tmp/asl-V69GM1.dsl 2022-05-18 10:22:27.239796759 +0100
@@ -36,11 +36,11 @@
[041h 0065 1] Reserved : 00
[042h 0066 2] Length : 0018
-[044h 0068 4] Endpoint start : 00003000
+[044h 0068 4] Endpoint start : 00001000
[048h 0072 2] PCI Segment start : 0000
[04Ah 0074 2] PCI Segment end : 0000
-[04Ch 0076 2] PCI BDF start : 3000
-[04Eh 0078 2] PCI BDF end : 30FF
+[04Ch 0076 2] PCI BDF start : 1000
+[04Eh 0078 2] PCI BDF end : 10FF
[050h 0080 2] Output node : 0030
[052h 0082 6] Reserved : 000000000000
@@ -48,11 +48,11 @@
[059h 0089 1] Reserved : 00
[05Ah 0090 2] Length : 0018
-[05Ch 0092 4] Endpoint start : 00001000
+[05Ch 0092 4] Endpoint start : 00003000
[060h 0096 2] PCI Segment start : 0000
[062h 0098 2] PCI Segment end : 0000
-[064h 0100 2] PCI BDF start : 1000
-[066h 0102 2] PCI BDF end : 10FF
+[064h 0100 2] PCI BDF start : 3000
+[066h 0102 2] PCI BDF end : 30FF
[068h 0104 2] Output node : 0030
[06Ah 0106 6] Reserved : 000000000000
@@ -62,6 +62,6 @@
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 03 00 30 00 00 00 00 00 00 00 00 00 // ......0.........
0030: 03 00 10 00 00 00 10 00 00 00 00 00 00 00 00 00 // ................
- 0040: 01 00 18 00 00 30 00 00 00 00 00 00 00 30 FF 30 // .....0.......0.0
- 0050: 30 00 00 00 00 00 00 00 01 00 18 00 00 10 00 00 // 0...............
- 0060: 00 00 00 00 00 10 FF 10 30 00 00 00 00 00 00 00 // ........0.......
+ 0040: 01 00 18 00 00 10 00 00 00 00 00 00 00 10 FF 10 // ................
+ 0050: 30 00 00 00 00 00 00 00 01 00 18 00 00 30 00 00 // 0............0..
+ 0060: 00 00 00 00 00 30 FF 30 30 00 00 00 00 00 00 00 // .....0.00.......
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220525173232.31429-7-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-09 19:32:49 -04:00
Jonathan Cameron
3546b0529a
tests/acpi: Update q35/CEDT.cxl for new memory addresses.
...
The CEDT table includes addreses of host bridge registers.
There are allocated in a different order due to the previous
patch, so update to the table is needed.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Message-Id: <20220608145440.26106-7-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-09 19:32:49 -04:00
Igor Mammedov
f3115cdd9c
tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs
...
expected move of tmp-tis device description directly under
Device(ISA) node.
for tpm-tis 2.0:
@@ -145,6 +145,189 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
+ Device (TPM)
+ {
+ Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID
+ Name (_STR, "TPM 2.0 Device") // _STR: Description String
+ Name (_UID, One) // _UID: Unique ID
+ Name (_STA, 0x0F) // _STA: Status
...
+ }
@@ -3281,189 +3464,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Method (PCNT, 0, NotSerialized)
{
}
-
- Device (TPM)
- {
- Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID
- Name (_STR, "TPM 2.0 Device") // _STR: Description String
- Name (_UID, One) // _UID: Unique ID
- Name (_STA, 0x0F) // _STA: Status
...
- }
for tpm-tis 1.2:
@@ -145,6 +145,188 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
+ Device (TPM)
+ {
+ Name (_HID, EisaId ("PNP0C31")) // _HID: Hardware ID
+ Name (_UID, One) // _UID: Unique ID
+ Name (_STA, 0x0F) // _STA: Status
...
+ }
@@ -3281,188 +3463,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
Method (PCNT, 0, NotSerialized)
{
}
-
- Device (ISA.TPM)
- {
- Name (_HID, EisaId ("PNP0C31")) // _HID: Hardware ID
- Name (_UID, One) // _UID: Unique ID
- Name (_STA, 0x0F) // _STA: Status
...
- }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20220608135340.3304695-35-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-09 19:32:49 -04:00
Igor Mammedov
d09ac1167e
tests: acpi: update expected DSDT.pvpanic-isa blob
...
@@ -145,6 +145,37 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
+ Device (PEVT)
+ {
+ Name (_HID, "QEMU0001") // _HID: Hardware ID
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ IO (Decode16,
+ 0x0505, // Range Minimum
+ 0x0505, // Range Maximum
+ 0x01, // Alignment
+ 0x01, // Length
+ )
+ })
+ OperationRegion (PEOR, SystemIO, 0x0505, One)
+ Field (PEOR, ByteAcc, NoLock, Preserve)
+ {
+ PEPT, 8
+ }
+
+ Name (_STA, 0x0F) // _STA: Status
+ Method (RDPT, 0, NotSerialized)
+ {
+ Local0 = PEPT /* \_SB_.PCI0.ISA_.PEVT.PEPT */
+ Return (Local0)
+ }
+
+ Method (WRPT, 1, NotSerialized)
+ {
+ PEPT = Arg0
+ }
+ }
+
Device (KBD)
{
Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
@@ -3246,40 +3277,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
}
}
- Scope (\_SB.PCI0.ISA)
- {
- Device (PEVT)
- {
- Name (_HID, "QEMU0001") // _HID: Hardware ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- IO (Decode16,
- 0x0505, // Range Minimum
- 0x0505, // Range Maximum
- 0x01, // Alignment
- 0x01, // Length
- )
- })
- OperationRegion (PEOR, SystemIO, 0x0505, One)
- Field (PEOR, ByteAcc, NoLock, Preserve)
- {
- PEPT, 8
- }
-
- Name (_STA, 0x0F) // _STA: Status
- Method (RDPT, 0, NotSerialized)
- {
- Local0 = PEPT /* \_SB_.PCI0.ISA_.PEVT.PEPT */
- Return (Local0)
- }
-
- Method (WRPT, 1, NotSerialized)
- {
- PEPT = Arg0
- }
- }
- }
-
Scope (\_SB)
{
Scope (PCI0)
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220608135340.3304695-30-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-09 19:32:49 -04:00
Romain Malmain