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  • e701cd77ab qapi/yank: Clean up documentaion of yank Markus Armbruster 2024-02-05 08:47:04 +01:00
  • ca86608f7b qga/qapi-schema: Plug trivial documentation holes Markus Armbruster 2024-02-05 08:47:03 +01:00
  • 0b34cf84e6 qga/qapi-schema: Clean up documentation of guest-set-vcpus Markus Armbruster 2024-02-05 08:47:02 +01:00
  • ab27bb03d3 qga/qapi-schema: Clean up documentation of guest-set-memory-blocks Markus Armbruster 2024-02-05 08:47:01 +01:00
  • 0cec50119f qapi: Require member documentation (with loophole) Markus Armbruster 2024-02-05 08:47:00 +01:00
  • fd62bff901 sphinx/qapidoc: Drop code to generate doc for simple union tag Markus Armbruster 2024-02-05 08:46:59 +01:00
  • 1ed1d4d608 qapi: Indent tagged doc comment sections properly Markus Armbruster 2024-02-05 08:46:58 +01:00
  • d988487882 qapi/block-core: Fix BlockLatencyHistogramInfo doc markup Markus Armbruster 2024-02-05 08:46:57 +01:00
  • 399c8cd3ba docs/devel/qapi-code-gen: Tweak doc comment whitespace Markus Armbruster 2024-02-05 08:46:56 +01:00
  • 1ccdae0b6e docs/devel/qapi-code-gen: Normalize version refs x.y.0 to just x.y Markus Armbruster 2024-02-05 08:46:55 +01:00
  • 7c0dfcf939 target/hppa: Update SeaBIOS-hppa to version 16 Helge Deller 2024-02-11 13:24:30 +01:00
  • 9b60a3ed55 hw/net/tulip: add chip status register values Sven Schnelle 2024-02-05 20:47:17 +01:00
  • 68e3e604d6 target/hppa: PDC_BTLB_INFO uses 32-bit ints Helge Deller 2024-02-07 00:49:28 +01:00
  • 7b2d70a175 target/hppa: Allow read-access to PSW with rsm 0,reg instruction Helge Deller 2024-02-07 00:49:28 +01:00
  • 32d26ea407 lasi: Add reset I/O ports for LASI audio and FDC Helge Deller 2024-02-03 01:04:45 +01:00
  • 9ccbe394d2 target/hppa: Implement do_transaction_failed handler for I/O errors Helge Deller 2024-02-03 00:04:30 +01:00
  • f2ffd6fb40 lasi: allow access to LAN MAC address registers Helge Deller 2024-02-02 22:53:08 +01:00
  • f410b688af hw/pci-host/astro: Implement Hard Fail and Soft Fail mode Helge Deller 2024-02-02 21:28:50 +01:00
  • b7174d9ad3 hw/pci-host/astro: Avoid aborting on access failure Helge Deller 2024-02-02 21:05:56 +01:00
  • dbca083513 target/hppa: Add "diag 0x101" for console output support Helge Deller 2024-02-02 11:57:11 +01:00
  • 1a72469ccc disas/hppa: Add disassembly for qemu specific instructions Helge Deller 2024-02-02 11:08:57 +01:00
  • 86b75667e0 tests/tcg: Add the syscall catchpoint gdbstub test Ilya Leoshkevich 2024-02-07 16:38:12 +00:00
  • 046f143c51 gdbstub: Implement catching syscalls Ilya Leoshkevich 2024-02-07 16:38:11 +00:00
  • 0a0d87c9b8 gdbstub: Add syscall entry/return hooks Ilya Leoshkevich 2024-02-07 16:38:10 +00:00
  • 8b7fcb8ed1 gdbstub: Allow specifying a reason in stop packets Ilya Leoshkevich 2024-02-07 16:38:09 +00:00
  • 4aad096587 gdbstub: Expose TARGET_SIGTRAP in a target-agnostic way Ilya Leoshkevich 2024-02-07 16:38:08 +00:00
  • 2df1eb2756 kconfig: use "select" to enable semihosting Paolo Bonzini 2024-02-07 16:38:07 +00:00
  • 1fed4cd04d Revert "hw/elf_ops: Ignore loadable segments with zero size" Alex Bennée 2024-02-07 16:38:02 +00:00
  • 15cc103362 configure: run plugin TCG tests again Paolo Bonzini 2024-02-07 16:38:01 +00:00
  • c7bbef4023 docs: mark CRIS support as deprecated Alex Bennée 2024-02-07 16:38:00 +00:00
  • 7485508341 tests/docker: Add sqlite3 module to openSUSE Leap container Fabiano Rosas 2024-02-07 16:37:59 +00:00
  • df50424b4d Merge tag 'pull-riscv-to-apply-20240209' of https://github.com/alistair23/qemu into staging Peter Maydell 2024-02-09 16:15:01 +00:00
  • d87b258b75 tests: Add case for LUKS volume with detached header Hyman Huang 2024-01-30 13:37:25 +08:00
  • 0bd779e27e crypto: Introduce 'detached-header' field in QCryptoBlockInfoLUKS Hyman Huang 2024-01-30 13:37:24 +08:00
  • 35286daeca block: Support detached LUKS header creation using qemu-img Hyman Huang 2024-01-30 13:37:23 +08:00
  • d0112eb415 block: Support detached LUKS header creation using blockdev-create Hyman Huang 2024-01-30 13:37:22 +08:00
  • d74523a3b3 crypto: Modify the qcrypto_block_create to support creation flags Hyman Huang 2024-01-30 13:37:21 +08:00
  • 433957bb7f qapi: Make parameter 'file' optional for BlockdevCreateOptionsLUKS Hyman Huang 2024-01-30 13:37:20 +08:00
  • 9ad5c4e7ee crypto: Support LUKS volume with detached header Hyman Huang 2024-01-30 13:37:19 +08:00
  • 003f15369d io: add trace event when cancelling TLS handshake Daniel P. Berrangé 2024-01-05 15:48:07 +00:00
  • cb8ded0f6d chardev: close QIOChannel before unref'ing Daniel P. Berrangé 2024-01-05 16:09:52 +00:00
  • 30c917b0d8 docs: re-generate x86_64 ABI compatibility CSV Daniel P. Berrangé 2023-05-10 12:51:01 +01:00
  • 86cf437d7a docs: fix highlighting of CPU ABI header rows Daniel P. Berrangé 2023-05-10 12:53:57 +01:00
  • f424bc3312 scripts: drop comment about autogenerated CPU API file Daniel P. Berrangé 2023-05-10 12:52:42 +01:00
  • 3b219d99af softmmu: remove obsolete comment about libvirt timeouts Daniel P. Berrangé 2023-09-08 18:55:36 +01:00
  • 0e74eb86ea ui: drop VNC feature _MASK constants Daniel P. Berrangé 2023-12-07 13:45:01 +00:00
  • 03e471c41d qemu_init: increase NOFILE soft limit on POSIX Fiona Ebner 2023-12-18 11:13:40 +01:00
  • 52ed9f455e crypto: Introduce SM4 symmetric cipher algorithm Hyman Huang 2023-12-07 23:47:35 +08:00
  • fdd51403a3 meson: sort C warning flags alphabetically Daniel P. Berrangé 2023-09-21 10:12:51 +01:00
  • 5d1fc61441 Merge tag 'migration-staging-pull-request' of https://gitlab.com/peterx/qemu into staging Peter Maydell 2024-02-09 11:22:20 +00:00
  • deb0ff0c77 target/riscv: add rv32i, rv32e and rv64e CPUs Daniel Henrique Barboza 2024-01-22 09:33:48 -03:00
  • b077aec9c9 target/riscv/cpu.c: add riscv_bare_cpu_init() Daniel Henrique Barboza 2024-01-22 09:33:47 -03:00
  • a65d51707d target/riscv: Enable xtheadsync under user mode LIU Zhiwei 2024-02-04 13:52:28 +08:00
  • e2ff0dec15 qemu-options: enable -smbios option on RISC-V Heinrich Schuchardt 2024-01-23 19:42:29 +01:00
  • ecf2864784 target/riscv: SMBIOS support for RISC-V virt machine Heinrich Schuchardt 2024-01-23 19:42:28 +01:00
  • 6f3b727bcc smbios: function to set default processor family Heinrich Schuchardt 2024-01-23 19:42:27 +01:00
  • b5831d7967 smbios: add processor-family option Heinrich Schuchardt 2024-01-23 19:42:26 +01:00
  • 1c8e491c45 target/riscv: support new isa extension detection devicetree properties Conor Dooley 2024-01-24 12:55:50 +00:00
  • afa42c21b5 target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS Conor Dooley 2024-01-24 12:55:49 +00:00
  • 79b50e2c80 target/riscv: Expose Zaamo and Zalrsc extensions Rob Bradford 2024-01-23 11:10:30 +00:00
  • 4f75d81225 target/riscv: Check 'A' and split extensions for atomic instructions Rob Bradford 2024-01-23 11:10:29 +00:00
  • 8caeda5bf5 target/riscv: Add Zaamo and Zalrsc extension infrastructure Rob Bradford 2024-01-23 11:10:28 +00:00
  • 5fb20f7600 hw/riscv/virt.c: use g_autofree in create_fdt_* Daniel Henrique Barboza 2024-01-22 19:15:29 -03:00
  • c70dc31f30 hw/riscv/virt.c: use g_autofree in virt_machine_init() Daniel Henrique Barboza 2024-01-22 19:15:28 -03:00
  • 1d873c6ecf hw/riscv/virt.c: use g_autofree in create_fdt_virtio() Daniel Henrique Barboza 2024-01-22 19:15:27 -03:00
  • 5d0e3bcb66 hw/riscv/virt.c: use g_autofree in create_fdt_sockets() Daniel Henrique Barboza 2024-01-22 19:15:26 -03:00
  • 73cdf38a92 hw/riscv/virt.c: use g_autofree in create_fdt_socket_cpus() Daniel Henrique Barboza 2024-01-22 19:15:25 -03:00
  • 74416394b5 hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix() Daniel Henrique Barboza 2024-01-22 19:15:24 -03:00
  • 1a49762c07 hw/riscv/virt-acpi-build.c: fix leak in build_rhct() Daniel Henrique Barboza 2024-01-22 19:15:23 -03:00
  • a5cb044ca4 target/riscv: Use RISCVException as return type for all csr ops LIU Zhiwei 2024-01-30 19:08:44 +08:00
  • ac8c8b6d1e target/riscv: FCSR doesn't contain vxrm and vxsat LIU Zhiwei 2024-01-30 19:09:45 +08:00
  • 1563cdb439 target/riscv: Validate misa_mxl_max only once Akihiko Odaki 2024-02-03 19:11:10 +09:00
  • 742cc269c7 target/riscv: Move misa_mxl_max to class Akihiko Odaki 2024-02-03 19:11:09 +09:00
  • 0e350c1ada target/riscv: Remove misa_mxl validation Akihiko Odaki 2024-02-03 19:11:08 +09:00
  • 6f4a6248bb target/riscv/kvm: get/set vector vregs[] Daniel Henrique Barboza 2024-01-23 13:17:14 -03:00
  • d4ff3da8f4 target/riscv/kvm: initialize 'vlenb' via get-reg-list Daniel Henrique Barboza 2024-01-23 13:17:13 -03:00
  • fafb0dc4d4 target/riscv/kvm: change kvm_reg_id to uint64_t Daniel Henrique Barboza 2024-01-23 13:17:12 -03:00
  • 4f6d036ccc target/riscv/cpu.c: remove cpu->cfg.vlen Daniel Henrique Barboza 2024-01-22 13:11:07 -03:00
  • 25669d275c trans_rvv.c.inc: use vext_get_vlmax() in trans_vrgather_v*() Daniel Henrique Barboza 2024-01-22 13:11:06 -03:00
  • cd21576de6 target/riscv: change vext_get_vlmax() arguments Daniel Henrique Barboza 2024-01-22 13:11:05 -03:00
  • 24a6aeecfe target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax() Daniel Henrique Barboza 2024-01-22 13:11:04 -03:00
  • bd2c82283d target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ() Daniel Henrique Barboza 2024-01-22 13:11:03 -03:00
  • 7aa4d519cb target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl) Daniel Henrique Barboza 2024-01-22 13:11:02 -03:00
  • 58bc9063ec target/riscv/vector_helper.c: use 'vlenb' Daniel Henrique Barboza 2024-01-22 13:11:01 -03:00
  • f5a5e71e01 target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb' Daniel Henrique Barboza 2024-01-22 13:11:00 -03:00
  • 81b9ef995a target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' Daniel Henrique Barboza 2024-01-22 13:10:59 -03:00
  • 33383193c8 target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb Daniel Henrique Barboza 2024-01-22 13:10:58 -03:00
  • 7cb59921c0 target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen' Daniel Henrique Barboza 2024-01-22 13:10:57 -03:00
  • 39b5efa5b8 target/riscv/csr.c: use 'vlenb' instead of 'vlen' Daniel Henrique Barboza 2024-01-22 13:10:56 -03:00
  • 04eb30a03c target/riscv: add 'vlenb' field in cpu->cfg Daniel Henrique Barboza 2024-01-22 13:10:55 -03:00
  • 0c4e579aac target/riscv: Implement optional CSR mcontext of debug Sdtrig extension Alvin Chang 2023-12-19 20:32:44 +08:00
  • 10efbe01ce target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-12 11:02:01 -03:00
  • 9bb9d42429 target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-12 11:02:00 -03:00
  • a9a25939c2 target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-12 11:01:59 -03:00
  • 08a2538710 target/riscv: remove riscv_cpu_options[] Daniel Henrique Barboza 2024-01-12 11:01:58 -03:00
  • 82f7b1d404 target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-12 11:01:57 -03:00
  • 811ef85324 target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-12 11:01:56 -03:00
  • b84efa39a0 target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-12 11:01:55 -03:00
  • bbef914044 target/riscv: create finalize_features() for KVM Daniel Henrique Barboza 2024-01-12 11:01:54 -03:00
  • 9d1173d20d target/riscv: move 'elen' to riscv_cpu_properties[] Daniel Henrique Barboza 2024-01-05 20:05:38 -03:00