alwin.berger/FRET-qemu
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  • 128c7d5194 tcg/s390x: Implement negsetcond_* Richard Henderson 2023-08-05 18:55:54 +00:00
  • 41e4c0a9ad tcg/riscv: Implement negsetcond_* Richard Henderson 2023-08-05 18:16:32 +00:00
  • fe06b89733 tcg/arm: Implement negsetcond_i32 Richard Henderson 2023-08-05 14:32:57 +00:00
  • f58a7dea0f tcg/aarch64: Implement negsetcond_* Richard Henderson 2023-08-05 14:27:12 +00:00
  • 72fa954a63 tcg/ppc: Use the Set Boolean Extension Richard Henderson 2023-08-05 02:04:56 +00:00
  • cba10bb3c8 tcg/ppc: Implement negsetcond_* Richard Henderson 2023-08-05 01:55:23 +00:00
  • b0a433be48 target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl Richard Henderson 2023-08-05 00:38:57 +00:00
  • e3ebbade58 target/sparc: Use tcg_gen_movcond_i64 in gen_edge Richard Henderson 2023-08-05 00:31:29 +00:00
  • 253d110dba target/ppc: Use tcg_gen_negsetcond_* Richard Henderson 2023-08-05 00:22:26 +00:00
  • cfe158875b target/openrisc: Use tcg_gen_negsetcond_* Richard Henderson 2023-08-05 00:15:06 +00:00
  • 27f9af76e1 target/m68k: Use tcg_gen_negsetcond_* Richard Henderson 2023-08-05 00:07:59 +00:00
  • a126425990 target/arm: Use tcg_gen_negsetcond_* Richard Henderson 2023-08-04 23:58:29 +00:00
  • d55a3211e2 target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero Richard Henderson 2023-08-04 23:40:42 +00:00
  • 4a88387056 tcg: Use tcg_gen_negsetcond_* Richard Henderson 2023-08-04 23:29:53 +00:00
  • 3635502dd0 tcg: Introduce negsetcond opcodes Richard Henderson 2023-08-04 23:24:04 +00:00
  • 13d885b0ad tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 Richard Henderson 2023-08-22 10:51:10 -07:00
  • bb9d7ee83e docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32() Philippe Mathieu-Daudé 2023-08-22 18:28:47 +02:00
  • 73f97f0aa3 tcg/i386: Allow immediate as input to deposit_* Richard Henderson 2023-08-13 11:49:27 -07:00
  • 8f7a840d7d tcg: Fold deposit with zero to and Richard Henderson 2023-08-13 11:03:05 -07:00
  • 36df88c040 tcg/i386: Drop BYTEH deposits for 64-bit Richard Henderson 2023-08-13 10:42:54 -07:00
  • 64919f710f target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg Richard Henderson 2023-08-05 17:36:02 -07:00
  • e79f81421b accel/tcg: Update run_on_cpu_data static assert Anton Johansson 2023-08-07 17:57:06 +02:00
  • d712b11638 accel/tcg: Widen address arg in tlb_compare_set() Anton Johansson 2023-08-07 17:57:05 +02:00
  • c78edb5639 include/exec: Widen tlb_hit/tlb_hit_page() Anton Johansson 2023-08-07 17:57:04 +02:00
  • fc15bfb6a6 include/exec: typedef abi_ptr to vaddr in softmmu Anton Johansson 2023-08-07 17:57:03 +02:00
  • 022b9bcede include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*() Anton Johansson 2023-08-07 17:57:02 +02:00
  • d447a624d0 sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint Anton Johansson 2023-08-07 17:57:01 +02:00
  • b8a6eb1862 sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint Anton Johansson 2023-08-07 17:57:00 +02:00
  • fcfe761680 accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint Anton Johansson 2023-08-07 17:56:59 +02:00
  • b67be03e3a accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint Anton Johansson 2023-08-07 17:56:58 +02:00
  • 50e7a40af3 Merge tag 'pull-target-arm-20230824' of https://git.linaro.org/people/pmaydell/qemu-arm into staging Stefan Hajnoczi 2023-08-24 10:08:33 -04:00
  • 6030ef9d41 Merge tag 'pull-loongarch-20230824' of https://gitlab.com/gaosong/qemu into staging Stefan Hajnoczi 2023-08-24 09:17:05 -04:00
  • 3f6bec4a9f
         hw/loongarch: Fix ACPI processor id off-by-one error Jiajie Chen 2023-08-20 18:56:59 +08:00
  • 17ffe331a9
         target/loongarch: Split fcc register to fcc0-7 in gdbstub Jiajie Chen 2023-08-08 13:42:47 +08:00
  • 2948c1fb6b
         hw/intc/loongarch_pch: fix edge triggered irq handling Bibo Mao 2023-07-07 17:15:57 +08:00
  • 14f21f673a
         target/loongarch: cpu: Implement get_arch_id callback Bibo Mao 2023-08-24 08:50:07 +08:00
  • a380c6f11f
         target/loongarch: Add avail_IOCSR to check iocsr instructions Song Gao 2023-08-22 09:22:19 +02:00
  • ebf288b410
         target/loongarch: Add avail_LSX to check LSX instructions Song Gao 2023-08-22 09:30:26 +02:00
  • b139ddf1e9
         target/loongarch: Add avail_LAM to check atomic instructions Song Gao 2023-08-22 09:19:57 +02:00
  • 70c8d5eaaa
         target/loongarch: Add avail_LSPW to check LSPW instructions Song Gao 2023-08-22 09:19:56 +02:00
  • 95e2ca2407
         target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions Song Gao 2023-08-22 09:19:55 +02:00
  • 3055122ff6
         hw/loongarch: Remove restriction of la464 cores in the virt machine Song Gao 2023-08-22 09:19:54 +02:00
  • bb8710cf0a
         target/loongarch: Add LoongArch32 cpu la132 Jiajie Chen 2023-08-22 09:19:53 +02:00
  • c0c0461e3a
         target/loongarch: Add avail_64 to check la64-only instructions Song Gao 2023-08-22 09:19:52 +02:00
  • ec3a951891
         target/loongarch: Add a check parameter to the TRANS macro Song Gao 2023-08-22 09:19:51 +02:00
  • 6496269d7e
         target/loongarch: Sign extend results in VA32 mode Jiajie Chen 2023-08-22 09:19:50 +02:00
  • 7033c0e6dd
         target/loongarch: Truncate high 32 bits of address in VA32 mode Jiajie Chen 2023-08-22 09:13:55 +02:00
  • 2f6478ffad
         target/loongarch: Extract set_pc() helper Jiajie Chen 2023-08-22 09:13:54 +02:00
  • 5a7ce25d0d
         target/loongarch: Extract make_address_pc() helper Jiajie Chen 2023-08-22 09:13:53 +02:00
  • c5af6628f4
         target/loongarch: Extract make_address_i() helper Jiajie Chen 2023-08-22 09:13:52 +02:00
  • 34423c0194
         target/loongarch: Extract make_address_x() helper Jiajie Chen 2023-08-22 09:13:51 +02:00
  • 3966582099
         target/loongarch: Add LA64 & VA32 to DisasContext Jiajie Chen 2023-08-22 09:13:50 +02:00
  • 50fffcc49b
         target/loongarch: Support LoongArch32 VPPN Jiajie Chen 2023-08-22 09:13:49 +02:00
  • eece576409
         target/loongarch: Support LoongArch32 DMW Jiajie Chen 2023-08-22 09:13:48 +02:00
  • e70bb6fb9a
         target/loongarch: Support LoongArch32 TLB entry Jiajie Chen 2023-08-22 09:13:47 +02:00
  • ebda3036e1
         target/loongarch: Add GDB support for loongarch32 mode Jiajie Chen 2023-08-21 14:59:59 +02:00
  • 6cbba3e9eb
         target/loongarch: Add new object class for loongarch32 cpus Jiajie Chen 2023-08-21 14:59:58 +02:00
  • 19f82a4a6a
         target/loongarch: Add function to check current arch Jiajie Chen 2023-08-21 14:59:57 +02:00
  • e389358e56
         target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init Philippe Mathieu-Daudé 2023-08-21 14:59:56 +02:00
  • 146f2354b5
         target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU Philippe Mathieu-Daudé 2023-08-21 14:59:55 +02:00
  • 0b36072786
         target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW Song Gao 2023-08-21 14:59:54 +02:00
  • 3a4b64c702
         target/loongarch: Remove duplicated disas_set_info assignment Philippe Mathieu-Daudé 2023-08-21 14:59:53 +02:00
  • 3da4004c21
         target/loongarch: Log I/O write accesses to CSR registers Philippe Mathieu-Daudé 2023-08-21 14:59:52 +02:00
  • 92e1d39f98 Merge tag 'pull-request-2023-08-23' of https://gitlab.com/thuth/qemu into staging Stefan Hajnoczi 2023-08-23 09:17:41 -04:00
  • 09a3fffae0 docs/about/license: Update LICENSE URL Philippe Mathieu-Daudé 2023-08-22 14:57:16 +02:00
  • 6c49f685d3 tests/tcg/s390x: Test VSTRS Ilya Leoshkevich 2023-08-05 01:03:19 +02:00
  • 791b2b6a93 target/s390x: Fix the "ignored match" case in VSTRS Ilya Leoshkevich 2023-08-05 01:03:18 +02:00
  • ffc8453bd2 linux-user/elfload: Enable vxe2 on s390x Ilya Leoshkevich 2023-08-05 01:03:17 +02:00
  • d194362910 include/hw/virtio/virtio-gpu: Fix virtio-gpu with blob on big endian hosts Thomas Huth 2023-08-15 14:20:07 +02:00
  • ce5943792f hw/s390x/s390-virtio-ccw: Remove superfluous code to set the NIC model Thomas Huth 2023-08-04 09:35:25 +02:00
  • 024d7cafd9 tests/tcg/s390x: Test VREP Ilya Leoshkevich 2023-08-07 18:34:32 +02:00
  • 23e87d419f target/s390x: Use a 16-bit immediate in VREP Ilya Leoshkevich 2023-08-07 18:34:31 +02:00
  • 93af6e0a61 tests/tcg/s390x: Test VSTL Ilya Leoshkevich 2023-08-05 01:55:34 +02:00
  • 6db3518ba4 target/s390x: Fix VSTL with a large length Ilya Leoshkevich 2023-08-05 01:55:33 +02:00
  • 6a2ea61518 target/s390x: Check reserved bits of VFMIN/VFMAX's M5 Ilya Leoshkevich 2023-08-05 01:46:10 +02:00
  • f4a69168ff s390x: Convert DPRINTF to trace events Cédric Le Goater 2023-08-04 10:04:15 +02:00
  • 95f5c89eca hw: Add compat machines for 8.2 Cornelia Huck 2023-07-18 16:22:35 +02:00
  • cd1e4db736 target/arm: Fix 64-bit SSRA Richard Henderson 2023-08-22 17:31:14 +01:00
  • 4b3520fd93 target/arm: Fix SME ST1Q Richard Henderson 2023-08-22 17:31:13 +01:00
  • f6fc36deef target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASK Jean-Philippe Brucker 2023-08-22 17:31:13 +01:00
  • 1acd00ef14 target/arm/helper: Check SCR_EL3.{NSE, NS} encoding for AT instructions Jean-Philippe Brucker 2023-08-22 17:31:13 +01:00
  • e1ee56ec23 target/arm: Pass security space rather than flag for AT instructions Jean-Philippe Brucker 2023-08-22 17:31:12 +01:00
  • f1269a98aa target/arm: Skip granule protection checks for AT instructions Jean-Philippe Brucker 2023-08-22 17:31:12 +01:00
  • ceaa97465f target/arm/helper: Fix tlbmask and tlbbits for TLBI VAE2* Jean-Philippe Brucker 2023-08-22 17:31:11 +01:00
  • da64251e93 target/arm/ptw: Load stage-2 tables from realm physical space Jean-Philippe Brucker 2023-08-22 17:31:11 +01:00
  • b17d86eb5e target/arm: Adjust PAR_EL1.SH for Device and Normal-NC memory types Peter Maydell 2023-08-22 17:31:10 +01:00
  • a729d63642 target/arm/ptw: Report stage 2 fault level for stage 2 faults on stage 1 ptw Peter Maydell 2023-08-22 17:31:10 +01:00
  • d53e25075b target/arm/ptw: Check for block descriptors at invalid levels Peter Maydell 2023-08-22 17:31:10 +01:00
  • 3d9ca96221 target/arm/ptw: Set attributes correctly for MMU disabled data accesses Peter Maydell 2023-08-22 17:31:09 +01:00
  • b02f5e06bc target/arm/ptw: Drop S1Translate::out_secure Peter Maydell 2023-08-22 17:31:09 +01:00
  • 6279f6dcdb target/arm/ptw: Remove S1Translate::in_secure Peter Maydell 2023-08-22 17:31:08 +01:00
  • cdbae5e7e1 target/arm/ptw: Remove last uses of ptw->in_secure Peter Maydell 2023-08-22 17:31:08 +01:00
  • b9c139dc58 target/arm/ptw: Only fold in NSTable bit effects in Secure state Peter Maydell 2023-08-22 17:31:08 +01:00
  • 4477020d38 target/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_secstate() Peter Maydell 2023-08-22 17:31:07 +01:00
  • 2d12bb96bd target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate() Peter Maydell 2023-08-22 17:31:07 +01:00
  • d1289140a0 target/arm/ptw: Pass ARMSecurityState to regime_translation_disabled() Peter Maydell 2023-08-22 17:31:06 +01:00
  • a5637bec4c target/arm/ptw: Pass ptw into get_phys_addr_pmsa*() and get_phys_addr_disabled() Peter Maydell 2023-08-22 17:31:06 +01:00
  • 4f51edd3cd target/arm/ptw: Set s1ns bit in fault info more consistently Peter Maydell 2023-08-22 17:31:05 +01:00
  • f641566074 target/arm/ptw: Don't report GPC faults on stage 1 ptw as stage2 faults Peter Maydell 2023-08-22 17:31:05 +01:00
  • c986d86039 target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault Peter Maydell 2023-08-22 17:31:05 +01:00