alwin.berger/FRET-qemu
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  • 386c4e86d0
         target/loongarch: Implement vfcmp Song Gao 2023-05-04 20:28:02 +08:00
  • f435e1e5af
         target/loongarch: Implement vseq vsle vslt Song Gao 2023-05-04 20:28:01 +08:00
  • 399665d2af
         target/loongarch: Implement LSX fpu fcvt instructions Song Gao 2023-05-04 20:28:00 +08:00
  • aca67472d2
         target/loongarch: Implement LSX fpu arith instructions Song Gao 2023-05-04 20:27:59 +08:00
  • ac95a0b975
         target/loongarch: Implement vfrstp Song Gao 2023-05-04 20:27:58 +08:00
  • 0b1e67051d
         target/loongarch: Implement vbitclr vbitset vbitrev Song Gao 2023-05-04 20:27:57 +08:00
  • bb22ee5763
         target/loongarch: Implement vpcnt Song Gao 2023-05-04 20:27:56 +08:00
  • 2e105e12a5
         target/loongarch: Implement vclo vclz Song Gao 2023-05-04 20:27:55 +08:00
  • 162cd32cfe
         target/loongarch: Implement vssrlrn vssrarn Song Gao 2023-05-04 20:27:54 +08:00
  • 83b3815dbc
         target/loongarch: Implement vssrln vssran Song Gao 2023-05-04 20:27:53 +08:00
  • a5200a17c9
         target/loongarch: Implement vsrlrn vsrarn Song Gao 2023-05-04 20:27:52 +08:00
  • d79fb8ddcd
         target/loongarch: Implement vsrln vsran Song Gao 2023-05-04 20:27:51 +08:00
  • ecb9371675
         target/loongarch: Implement vsrlr vsrar Song Gao 2023-05-04 20:27:50 +08:00
  • 9b21a7a510
         target/loongarch: Implement vsllwil vextl Song Gao 2023-05-04 20:27:49 +08:00
  • b281d6961d
         target/loongarch: Implement vsll vsrl vsra vrotr Song Gao 2023-05-04 20:27:48 +08:00
  • f205a539f6
         target/loongarch: Implement LSX logic instructions Song Gao 2023-05-04 20:27:47 +08:00
  • 789f4a4c86
         target/loongarch: Implement vmskltz/vmskgez/vmsknz Song Gao 2023-05-04 20:27:46 +08:00
  • f0e395dfb0
         target/loongarch: Implement vsigncov Song Gao 2023-05-04 20:27:45 +08:00
  • 3734ad9370
         target/loongarch: Implement vexth Song Gao 2023-05-04 20:27:44 +08:00
  • cbe44190cc
         target/loongarch: Implement vsat Song Gao 2023-05-04 20:27:43 +08:00
  • 4cc4c0f78b
         target/loongarch: Implement vdiv/vmod Song Gao 2023-05-04 20:27:42 +08:00
  • d3aec65bc1
         target/loongarch: Implement vmadd/vmsub/vmaddw{ev/od} Song Gao 2023-05-04 20:27:41 +08:00
  • cd1c49ada0
         target/loongarch: Implement vmul/vmuh/vmulw{ev/od} Song Gao 2023-05-04 20:27:40 +08:00
  • 9ab29520f7
         target/loongarch: Implement vmax/vmin Song Gao 2023-05-04 20:27:39 +08:00
  • af448cb31a
         target/loongarch: Implement vadda Song Gao 2023-05-04 20:27:38 +08:00
  • 4972565967
         target/loongarch: Implement vabsd Song Gao 2023-05-04 20:27:37 +08:00
  • 39e9b0a741
         target/loongarch: Implement vavg/vavgr Song Gao 2023-05-04 20:27:36 +08:00
  • 2d5f950c05
         target/loongarch: Implement vaddw/vsubw Song Gao 2023-05-04 20:27:35 +08:00
  • c037fbc97d
         target/loongarch: Implement vhaddw/vhsubw Song Gao 2023-05-04 20:27:34 +08:00
  • a94cb91107
         target/loongarch: Implement vsadd/vssub Song Gao 2023-05-04 20:27:33 +08:00
  • be9ec55758
         target/loongarch: Implement vneg Song Gao 2023-05-04 20:27:32 +08:00
  • d8be64c1c5
         target/loongarch: Implement vaddi/vsubi Song Gao 2023-05-04 20:27:31 +08:00
  • 57b4f1ac18
         target/loongarch: Implement vadd/vsub Song Gao 2023-05-04 20:27:30 +08:00
  • a3f3db5cda
         target/loongarch: Add CHECK_SXE maccro for check LSX enable Song Gao 2023-05-04 20:27:29 +08:00
  • a0c9400a5b
         target/loongarch: meson.build support build LSX Song Gao 2023-05-04 20:27:28 +08:00
  • 16f5396cec
         target/loongarch: Add LSX data type VReg Song Gao 2023-05-04 20:27:27 +08:00
  • 47d3878422 Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging Richard Henderson 2023-05-05 22:29:28 +01:00
  • 2149a21b2f Merge tag 'pull-ppc-20230505' of https://gitlab.com/danielhb/qemu into staging Richard Henderson 2023-05-05 22:28:48 +01:00
  • eb5c3932a3 Merge tag 'pw-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging Richard Henderson 2023-05-05 19:18:05 +01:00
  • 8ad8256ac4 Merge tag 'migration-20230505-pull-request' of https://gitlab.com/juan.quintela/qemu into staging Richard Henderson 2023-05-05 19:17:44 +01:00
  • 35a0bd63b4 tcg: Widen helper_*_st[bw]_mmu val arguments Richard Henderson 2023-04-09 22:11:39 -07:00
  • d78e4a4f7b tcg: Introduce arg_slot_stk_ofs Richard Henderson 2023-04-08 19:05:10 -07:00
  • 338b61e9e9 tcg: Replace REG_P with arg_loc_reg_p Richard Henderson 2023-04-08 17:28:07 -07:00
  • 2528f771f8 tcg: Move TCGLabelQemuLdst to tcg.c Richard Henderson 2023-04-07 18:18:03 -05:00
  • e2adae3f6f tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-07 19:32:51 -05:00
  • acfe94910e tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return Richard Henderson 2023-04-07 19:26:24 -05:00
  • 036547487b tcg/s390x: Introduce HostAddress Richard Henderson 2023-04-23 21:28:57 +01:00
  • 01a3b5dead tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 12:57:43 -07:00
  • f7041977a6 tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 13:27:16 -07:00
  • aeb6326ec5 tcg/riscv: Require TCG_TARGET_REG_BITS == 64 Richard Henderson 2023-03-23 23:03:18 +00:00
  • e3867bad0d tcg/ppc: Introduce HostAddress Richard Henderson 2023-04-23 20:10:00 +01:00
  • 6073988eef tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 12:53:46 -07:00
  • eb664d0c52 tcg/mips: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 12:52:26 -07:00
  • 9a2027b7a2 tcg/loongarch64: Introduce HostAddress Richard Henderson 2023-04-23 16:31:16 +01:00
  • 7f67e58236 tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-08 15:13:04 -07:00
  • 1df6d611bd tcg/arm: Introduce HostAddress Richard Henderson 2023-04-22 05:32:22 +01:00
  • 737fb471ed tcg/arm: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 12:51:01 -07:00
  • 7f65be51b6 tcg/aarch64: Introduce HostAddress Richard Henderson 2023-04-21 09:52:25 +01:00
  • ff0cc85ef3 tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 12:47:15 -07:00
  • a48f1c7415 tcg/i386: Introduce tcg_out_testi Richard Henderson 2022-11-08 14:30:27 +11:00
  • 3c2c35e23e tcg/i386: Drop r0+r1 local variables from tcg_out_tlb_load Richard Henderson 2023-04-19 18:43:35 +02:00
  • 61713c29a9 tcg/i386: Introduce HostAddress Richard Henderson 2023-04-19 18:29:14 +02:00
  • 3174941fe0 tcg/i386: Generalize multi-part load overlap test Richard Henderson 2023-04-16 15:56:41 +02:00
  • bf12e2240d tcg/i386: Rationalize args to tcg_out_qemu_{ld,st} Richard Henderson 2023-04-06 12:42:40 -07:00
  • 3ed8d2d4c8 target/sparc: Remove TARGET_ALIGNED_ONLY Richard Henderson 2023-05-02 16:15:23 +01:00
  • 60abd45224 target/sparc: Use cpu_ld*_code_mmu Richard Henderson 2023-05-02 16:14:19 +01:00
  • 316b6783f1 target/sparc: Use MO_ALIGN where required Richard Henderson 2023-05-02 16:12:44 +01:00
  • 0bd447ee64 target/hppa: Remove TARGET_ALIGNED_ONLY Richard Henderson 2023-05-02 09:53:13 +01:00
  • 2d4afb03e4 target/hppa: Use MO_ALIGN for system UNALIGN() Richard Henderson 2023-05-02 15:30:10 +01:00
  • e10e98bdb0 target/alpha: Remove TARGET_ALIGNED_ONLY Richard Henderson 2023-05-02 09:43:44 +01:00
  • 33948b68a7 target/alpha: Use MO_ALIGN where required Richard Henderson 2023-05-02 15:36:47 +01:00
  • 6ffaac9ca0 target/alpha: Use MO_ALIGN for system UNALIGN() Richard Henderson 2023-05-02 15:31:25 +01:00
  • 5fa7c0882d tcg: Remove compatability helpers for qemu ld/st Richard Henderson 2023-05-02 14:57:41 +01:00
  • f0aca2a912 target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_* Richard Henderson 2023-05-02 14:57:40 +01:00
  • 0814911883 target/sparc: Finish conversion to tcg_gen_qemu_{ld, st}_* Richard Henderson 2023-05-02 14:57:39 +01:00
  • e87027d022 target/s390x: Finish conversion to tcg_gen_qemu_{ld, st}_* Richard Henderson 2023-05-02 14:57:38 +01:00
  • 6d0cad1259 target/mips: Finish conversion to tcg_gen_qemu_{ld,st}_* Richard Henderson 2023-05-02 14:57:37 +01:00
  • b7a94da955 target/m68k: Finish conversion to tcg_gen_qemu_{ld,st}_* Richard Henderson 2023-05-02 14:57:36 +01:00
  • 53b26d253c target/Hexagon: Finish conversion to tcg_gen_qemu_{ld, st}_* Richard Henderson 2023-05-02 14:57:35 +01:00
  • a9a9c3fa6f target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_* Richard Henderson 2023-05-02 14:57:34 +01:00
  • 8b4506e5d2 target/avr: Finish conversion to tcg_gen_qemu_{ld,st}_* Richard Henderson 2023-05-02 14:57:33 +01:00
  • 1098cc3fcf softfloat: Fix the incorrect computation in float32_exp2 Shivaprasad G Bhat 2023-05-02 20:55:30 +05:30
  • b35261b1a6 hw/ppc/Kconfig: NVDIMM is a hard requirement for the pseries machine Thomas Huth 2023-05-04 20:05:21 +02:00
  • 0eb9fcc735 tests: tcg: ppc64: Add tests for Vector Extract Mask Instructions Shivaprasad G Bhat 2023-05-04 05:36:04 -04:00
  • 6a5d81b172 tcg: ppc64: Fix mask generation for vextractdm Shivaprasad G Bhat 2023-05-04 05:35:39 -04:00
  • fcdae0122d MAINTAINERS: Adding myself in the list for ppc/spapr Harsh Prateek Bora 2023-05-03 15:06:19 +05:30
  • 2060436aab ppc: spapr: cleanup cr get/set with helpers. Harsh Prateek Bora 2023-05-03 15:06:18 +05:30
  • 1b336bb63e hw/display/sm501: Remove unneeded increment from loop BALATON Zoltan 2023-04-05 17:57:19 +02:00
  • c2d3d1c294 audio/pwaudio.c: Add Pipewire audio backend for QEMU Dorinda Bassey 2023-04-17 12:56:54 +02:00
  • a9fe9e191b Merge tag 'pull-riscv-to-apply-20230505-1' of https://github.com/alistair23/qemu into staging Richard Henderson 2023-05-05 09:25:13 +01:00
  • e1d084a852 target/riscv: add Ventana's Veyron V1 CPU Rahul Pathak 2023-04-18 09:36:24 -03:00
  • 190e9f8ec1 riscv: Make sure an exception is raised if a pte is malformed Alexandre Ghiti 2023-04-20 17:02:20 +02:00
  • 7bf14a2f37 target/riscv: Fix Guest Physical Address Translation Irina Ryapolova 2023-04-18 10:54:23 +03:00
  • eae04c4c13 target/riscv: Restore the predicate() NULL check behavior Bin Meng 2023-04-17 12:30:54 +08:00
  • 9e1a30d342 target/riscv: add TYPE_RISCV_DYNAMIC_CPU Daniel Henrique Barboza 2023-04-11 15:35:11 -03:00
  • c0177f911f target/riscv: add query-cpy-definitions support Daniel Henrique Barboza 2023-04-11 15:35:10 -03:00
  • 85840bd2e0 target/riscv: add CPU QOM header Daniel Henrique Barboza 2023-04-11 15:35:09 -03:00
  • 2e6dba15cd hw/intc/riscv_aplic: Zero init APLIC internal state Ivan Klokov 2023-04-13 16:34:32 +03:00
  • 38303e8a2c target/riscv: Reorg sum check in get_physical_address Richard Henderson 2023-04-12 13:43:33 +02:00
  • e1dd15076b target/riscv: Reorg access check in get_physical_address Richard Henderson 2023-04-12 13:43:32 +02:00