alwin.berger/FRET-qemu
1
0
Fork 1
Code Issues Pull Requests Projects Releases Wiki Activity

Commit Graph

  • 44d58e938b target/i386: add a note about gen_jcc1 Paolo Bonzini 2024-08-14 13:44:47 +02:00
  • cea677e821 target/i386: add a few more trivial CCPrepare cases Paolo Bonzini 2024-07-01 21:11:07 +02:00
  • 37df7c4d57 target/i386: optimize TEST+Jxx sequences Paolo Bonzini 2024-06-20 11:31:33 +02:00
  • ae14b33de8 target/i386: optimize computation of ZF from CC_OP_DYNAMIC Paolo Bonzini 2024-06-20 10:34:28 +02:00
  • 1f7f72bdc4 target/i386: Wrap cc_op_live with a validity check Richard Henderson 2024-07-01 11:08:50 +02:00
  • f359b2fb71 target/i386: Introduce cc_op_size Richard Henderson 2024-07-15 14:34:29 +02:00
  • ee806f9f67 target/i386: Rearrange CCOp Richard Henderson 2024-07-15 14:31:56 +02:00
  • e09447c39f target/i386: remove CC_OP_CLR Paolo Bonzini 2024-06-20 10:16:47 +02:00
  • c2954745f2 target/i386: Tidy cc_op_str usage Richard Henderson 2024-06-30 19:51:11 -07:00
  • a635390f05 target/i386: use tcg_gen_ext_tl when applicable Paolo Bonzini 2024-09-03 09:50:00 +02:00
  • cf4344639b ci: always invoke meson through pyvenv Paolo Bonzini 2024-10-31 15:09:52 +01:00
  • 05bad41ba9 docs/nitro-enclave: Documentation for nitro-enclave machine type Dorjoy Chowdhury 2024-10-09 03:17:27 +06:00
  • f1826463d2 machine/nitro-enclave: New machine type for AWS Nitro Enclaves Dorjoy Chowdhury 2024-10-09 03:17:26 +06:00
  • 1a9867498d core/machine: Make create_default_memdev machine a virtual method Dorjoy Chowdhury 2024-10-09 03:17:25 +06:00
  • 63d2a5c787 hw/core: Add Enclave Image Format (EIF) related helpers Dorjoy Chowdhury 2024-10-09 03:17:24 +06:00
  • bb154e3e0c device/virtio-nsm: Support for Nitro Secure Module device Dorjoy Chowdhury 2024-10-09 03:17:23 +06:00
  • 1ac32dc8ea tests/lcitool: Update libvirt-ci and add libcbor dependency Dorjoy Chowdhury 2024-10-09 03:17:22 +06:00
  • 7cac7aa704 target/i386/hvf: fix handling of XSAVE-related CPUID bits Paolo Bonzini 2024-10-30 16:31:26 +01:00
  • 9c07a7af5d target/i386: Expose new feature bits in CPUID 8000_0021_EAX/EBX Babu Moger 2024-10-24 17:18:24 -05:00
  • 2ec282b8ea target/i386: Expose bits related to SRSO vulnerability Babu Moger 2024-10-24 17:18:23 -05:00
  • 209b0ac120 target/i386: Add PerfMonV2 feature bit Sandipan Das 2024-10-24 17:18:21 -05:00
  • 9c882ad4dc target/i386: Fix minor typo in NO_NESTED_DATA_BP feature bit Babu Moger 2024-10-24 17:18:19 -05:00
  • f41823e059 qom: allow user-creatable classes to be in modules Paolo Bonzini 2024-10-29 10:46:38 +01:00
  • 02009a12bc qom: let object_new use a module if the type is not present Paolo Bonzini 2024-10-29 10:41:58 +01:00
  • 144d80f69e qom: centralize module-loading functionality Paolo Bonzini 2024-10-29 10:31:30 +01:00
  • b801e3cb2a qom: use object_new_with_class when possible Paolo Bonzini 2024-10-29 10:45:51 +01:00
  • 845b54efaf qom: remove unused function Paolo Bonzini 2024-10-29 10:20:46 +01:00
  • 855bdb6c8a i386/cpu: Drop the check of phys_bits in host_cpu_realizefn() Xiaoyao Li 2024-09-29 04:57:47 -04:00
  • 8aade934df accel: remove dead statement and useless assertion Paolo Bonzini 2024-10-29 10:43:16 +01:00
  • 3139ad088b MAINTAINERS: Add myself as a reviewer of x86 general architecture support Zhao Liu 2024-10-22 10:36:28 +08:00
  • 14ed29da41 configure, meson: deprecate 32-bit MIPS Paolo Bonzini 2024-10-27 14:07:01 +01:00
  • 0665b3f992 configure: detect 64-bit MIPS Paolo Bonzini 2024-10-27 14:04:10 +01:00
  • 92ec780519 Merge tag 'pull-riscv-to-apply-20241031-1' of https://github.com/alistair23/qemu into staging Peter Maydell 2024-10-31 16:34:25 +00:00
  • b01a0bc334
         Fix helper function calls & support for new x86 decoder (#92) Romain Malmain 2024-10-31 16:31:54 +01:00
  • ea8ae47bdd Merge tag 'pull-target-arm-20241029' of https://git.linaro.org/people/pmaydell/qemu-arm into staging Peter Maydell 2024-10-31 13:28:57 +00:00
  • c128d39ede target/riscv: Fix vcompress with rvv_ta_all_1s Anton Blanchard 2024-10-30 15:35:38 +11:00
  • fd16cfb299 target/riscv/kvm: clarify how 'riscv-aia' default works Daniel Henrique Barboza 2024-10-28 15:20:37 -03:00
  • d201a127e1 target/riscv/kvm: set 'aia_mode' to default in error path Daniel Henrique Barboza 2024-10-28 15:20:36 -03:00
  • 77cfbf5d08 docs/specs: add riscv-iommu Daniel Henrique Barboza 2024-10-16 17:40:36 -03:00
  • d4f7804bac qtest/riscv-iommu-test: add init queues test Daniel Henrique Barboza 2024-10-16 17:40:35 -03:00
  • a7aa525b93 hw/riscv/riscv-iommu: add DBG support Tomasz Jeznach 2024-10-16 17:40:34 -03:00
  • 69a9ae4836 hw/riscv/riscv-iommu: add ATS support Tomasz Jeznach 2024-10-16 17:40:33 -03:00
  • 9d085a1c3c hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) Tomasz Jeznach 2024-10-16 17:40:32 -03:00
  • 40b44316d8 test/qtest: add riscv-iommu-pci tests Daniel Henrique Barboza 2024-10-16 17:40:31 -03:00
  • df240d66ef hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug Tomasz Jeznach 2024-10-16 17:40:30 -03:00
  • b9b283260e hw/riscv: add riscv-iommu-pci reference device Tomasz Jeznach 2024-10-16 17:40:29 -03:00
  • 3c445dacc4 pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device Daniel Henrique Barboza 2024-10-16 17:40:28 -03:00
  • 0c54acb824 hw/riscv: add RISC-V IOMMU base emulation Tomasz Jeznach 2024-10-16 17:40:27 -03:00
  • e21b3b243f hw/riscv: add riscv-iommu-bits.h Tomasz Jeznach 2024-10-16 17:40:26 -03:00
  • c6f3443af1 exec/memtxattr: add process identifier to the transaction attributes Tomasz Jeznach 2024-10-16 17:40:25 -03:00
  • a6a47319dd target/riscv: Expose zicfiss extension as a cpu property Deepak Gupta 2024-10-08 15:50:10 -07:00
  • e75f945123 disas/riscv: enable disassembly for compressed sspush/sspopchk Deepak Gupta 2024-10-08 15:50:09 -07:00
  • b9080d0765 disas/riscv: enable disassembly for zicfiss instructions Deepak Gupta 2024-10-08 15:50:08 -07:00
  • b57e4e785b scripts: remove erroneous file that breaks git clone on Windows Pierrick Bouvier 2024-10-23 00:39:14 -07:00
  • 14bde8cd76 target/i386: fix CPUID check for LFENCE and SFENCE Paolo Bonzini 2024-10-21 08:59:03 +02:00
  • 15195de6a9 ci: enable rust in the Fedora system build job Daniel P. Berrangé 2024-10-15 14:39:25 +01:00
  • 548de8f8dc tests: add 'rust' and 'bindgen' to CI package list Daniel P. Berrangé 2024-10-15 14:39:24 +01:00
  • 388b849fb6 stubs: avoid duplicate symbols in libqemuutil.a Paolo Bonzini 2024-10-21 18:07:16 +02:00
  • 905c032417 target/riscv: compressed encodings for sspush and sspopchk Deepak Gupta 2024-10-08 15:50:07 -07:00
  • f06bfe3dc3 target/riscv: implement zicfiss instructions Deepak Gupta 2024-10-08 15:50:06 -07:00
  • f21b36a022 target/riscv: update decode_save_opc to store extra word2 Deepak Gupta 2024-10-08 15:50:05 -07:00
  • 98f21c30f5 target/riscv: AMO operations always raise store/AMO fault Deepak Gupta 2024-10-08 15:50:04 -07:00
  • 669b486749 target/riscv: mmu changes for zicfiss shadow stack protection Deepak Gupta 2024-10-08 15:50:03 -07:00
  • f9fdf9077c target/riscv: tb flag for shadow stack instructions Deepak Gupta 2024-10-08 15:50:02 -07:00
  • 8205bc127a target/riscv: introduce ssp and enabling controls for zicfiss Deepak Gupta 2024-10-08 15:50:01 -07:00
  • cf064a671a target/riscv: Add zicfiss extension Deepak Gupta 2024-10-08 15:50:00 -07:00
  • ff81343e74 target/riscv: Expose zicfilp extension as a cpu property Deepak Gupta 2024-10-08 15:49:59 -07:00
  • 5e761bd613 disas/riscv: enable lpad disassembly Deepak Gupta 2024-10-08 15:49:58 -07:00
  • 966f3a3895 target/riscv: zicfilp lpad impl and branch tracking Deepak Gupta 2024-10-08 15:49:57 -07:00
  • b039c96113 target/riscv: tracking indirect branches (fcfi) for zicfilp Deepak Gupta 2024-10-08 15:49:56 -07:00
  • 6031102401 target/riscv: additional code information for sw check Deepak Gupta 2024-10-08 15:49:55 -07:00
  • 53309be156 target/riscv: save and restore elp state on priv transitions Deepak Gupta 2024-10-08 15:49:54 -07:00
  • 4923f672e3 target/riscv: Introduce elp state and enabling controls for zicfilp Deepak Gupta 2024-10-08 15:49:53 -07:00
  • bd08b22e56 target/riscv: Add zicfilp extension Deepak Gupta 2024-10-08 15:49:52 -07:00
  • f9158a9240 target/riscv: expose *envcfg csr and priv to qemu-user as well Deepak Gupta 2024-10-08 15:49:51 -07:00
  • 53c1557b23 hw/char: sifive_uart: Print uart characters async Alistair Francis 2024-08-15 10:57:28 +10:00
  • 4a0e8ca322 hw/char: riscv_htif: Use blocking qemu_chr_fe_write_all Alistair Francis 2024-08-13 13:32:51 +10:00
  • 2ae6cca1d3 hw/intc/riscv_aplic: Check and update pending when write sourcecfg Yong-Xuan Wang 2024-10-04 18:46:47 +08:00
  • f8c1f36a2e target/riscv: Set vtype.vill on CPU reset Rob Bradford 2024-09-30 17:52:57 +01:00
  • a84be2baa9 hw/intc: Don't clear pending bits on IRQ lowering Sergey Makarov 2024-09-18 17:02:29 +03:00
  • 41fc1f0294 hw/intc: Make zeroth priority register read-only Sergey Makarov 2024-09-18 17:02:28 +03:00
  • bfd12c92cc tests/avocado: Boot Linux for RV32 cpu on RV64 QEMU LIU Zhiwei 2024-09-19 13:50:48 +08:00
  • 48cea772c3 target/riscv: Add max32 CPU for RV64 QEMU LIU Zhiwei 2024-09-19 13:50:47 +08:00
  • e087bd4de3 target/riscv: Enable RV32 CPU support in RV64 QEMU TANG Tiancheng 2024-09-19 13:50:46 +08:00
  • 58597bfeab target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU TANG Tiancheng 2024-09-19 13:50:45 +08:00
  • 870589dcdd target/riscv: Detect sxl to set bit width for RV32 in RV64 TANG Tiancheng 2024-09-19 13:50:44 +08:00
  • 929e4277c1 target/riscv: Correct SXL return value for RV32 in RV64 QEMU TANG Tiancheng 2024-09-19 13:50:43 +08:00
  • efd29e3398 target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 TANG Tiancheng 2024-09-19 13:50:42 +08:00
  • 658384884a target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI TANG Tiancheng 2024-09-19 13:50:41 +08:00
  • 5a60026cad target/riscv/csr.c: Fix an access to VXSAT Evgenii Prokopiev 2024-10-02 11:44:36 +03:00
  • e4bad9cc5e Merge tag 'pull-virtio-gpu-vulkan-291024-1' of https://gitlab.com/stsquad/qemu into staging Peter Maydell 2024-10-29 17:05:54 +00:00
  • 84f298ea3e target/arm: kvm: require KVM_CAP_DEVICE_CTRL Paolo Bonzini 2024-10-29 12:54:46 +00:00
  • 361dfa9757 docs/devel/reset: Fix minor grammatical error Peter Maydell 2024-10-29 12:54:45 +00:00
  • bab209af35 target/arm: Fix arithmetic underflow in SETM instruction Ido Plat 2024-10-29 12:54:45 +00:00
  • a892728021 docs/system/target-arm.rst: Remove "many boards are undocumented" note Peter Maydell 2024-10-29 12:54:45 +00:00
  • 946f9ef267 docs/system/arm: Add placeholder docs for mcimx6ul-evk and mcimx7d-sabre Peter Maydell 2024-10-29 12:54:44 +00:00
  • 6128720af8 docs/system/arm: Add placeholder doc for xlnx-zcu102 board Peter Maydell 2024-10-29 12:54:44 +00:00
  • f99e1d314d docs/system/arm: Add placeholder doc for exynos4 boards Peter Maydell 2024-10-29 12:54:44 +00:00
  • 6a98e614e5 docs/system/arm: Split fby35 out from aspeed.rst Peter Maydell 2024-10-29 12:54:44 +00:00
  • 23a26bfeea docs/system/arm: Don't use wildcard '*-bmc' in doc titles Peter Maydell 2024-10-29 12:54:43 +00:00