FRET-qemu/tests/tcg/x86_64/test-2413.c
Richard Henderson a71d9dfbf6 tcg/optimize: Fix TCG_COND_TST* simplification of setcond2
Argument ordering for setcond2 is:

  output, a_low, a_high, b_low, b_high, cond

The test is supposed to be against b_low, not a_high.

Cc: qemu-stable@nongnu.org
Fixes: ceb9ee06b71 ("tcg/optimize: Handle TCG_COND_TST{EQ,NE}")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2413
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240701024623.1265028-1-richard.henderson@linaro.org>
2024-07-03 10:24:12 -07:00

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C

/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Copyright 2024 Linaro, Ltd. */
/* See https://gitlab.com/qemu-project/qemu/-/issues/2413 */
#include <assert.h>
void test(unsigned long *a, unsigned long *d, unsigned long c)
{
asm("xorl %%eax, %%eax\n\t"
"xorl %%edx, %%edx\n\t"
"testb $0x20, %%cl\n\t"
"sete %%al\n\t"
"setne %%dl\n\t"
"shll %%cl, %%eax\n\t"
"shll %%cl, %%edx\n\t"
: "=a"(*a), "=d"(*d)
: "c"(c));
}
int main(void)
{
unsigned long a, c, d;
for (c = 0; c < 64; c++) {
test(&a, &d, c);
assert(a == (c & 0x20 ? 0 : 1u << (c & 0x1f)));
assert(d == (c & 0x20 ? 1u << (c & 0x1f) : 0));
}
return 0;
}