David Venhoff
cfcea9ee67
Based off b80915eb99
and compacted into a single commit so that it will fit on the uni git server
52 lines
1.5 KiB
Plaintext
52 lines
1.5 KiB
Plaintext
Bindings for HyperBus Memory Controller (HBMC) on TI's K3 family of SoCs
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Required properties:
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- compatible : "ti,am654-hbmc" for AM654 SoC
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- reg : Two entries:
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First entry pointed to the register space of HBMC controller
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Second entry pointing to the memory map region dedicated for
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MMIO access to attached flash devices
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- ranges : Address translation from offset within CS to allocated MMIO
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space in SoC
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Optional properties:
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- mux-controls : phandle to the multiplexer that controls selection of
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HBMC vs OSPI inside Flash SubSystem (FSS). Default is OSPI,
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if property is absent.
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See Documentation/devicetree/bindings/mux/reg-mux.txt
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for mmio-mux binding details
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Example:
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system-controller@47000000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x0 0x47000000 0x0 0x100>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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hbmc_mux: multiplexer {
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compatible = "mmio-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x4 0x2>; /* 0: reg 0x4, bit 1 */
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};
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};
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hbmc: hyperbus@47034000 {
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compatible = "ti,am654-hbmc";
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reg = <0x0 0x47034000 0x0 0x100>,
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<0x5 0x00000000 0x1 0x0000000>;
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power-domains = <&k3_pds 55>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
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<0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
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mux-controls = <&hbmc_mux 0>;
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/* Slave flash node */
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flash@0,0 {
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compatible = "cypress,hyperflash", "cfi-flash";
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reg = <0x0 0x0 0x4000000>;
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};
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};
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