David Venhoff
cfcea9ee67
Based off b80915eb99
and compacted into a single commit so that it will fit on the uni git server
23 lines
669 B
Plaintext
23 lines
669 B
Plaintext
* Amlogic audio memory arbiter controller
|
|
|
|
The Amlogic Audio ARB is a simple device which enables or
|
|
disables the access of Audio FIFOs to DDR on AXG based SoC.
|
|
|
|
Required properties:
|
|
- compatible: 'amlogic,meson-axg-audio-arb' or
|
|
'amlogic,meson-sm1-audio-arb'
|
|
- reg: physical base address of the controller and length of memory
|
|
mapped region.
|
|
- clocks: phandle to the fifo peripheral clock provided by the audio
|
|
clock controller.
|
|
- #reset-cells: must be 1.
|
|
|
|
Example on the A113 SoC:
|
|
|
|
arb: reset-controller@280 {
|
|
compatible = "amlogic,meson-axg-audio-arb";
|
|
reg = <0x0 0x280 0x0 0x4>;
|
|
#reset-cells = <1>;
|
|
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
|
|
};
|