i.MX: Add code to emulate i.MX2 watchdog IP block
Add enough code to emulate i.MX2 watchdog IP block so it would be possible to reboot the machine running Linux Guest. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Jason Wang <jasowang@redhat.com> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: yurovsky@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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				| @ -34,6 +34,7 @@ obj-$(CONFIG_IMX) += imx25_ccm.o | ||||
| obj-$(CONFIG_IMX) += imx6_ccm.o | ||||
| obj-$(CONFIG_IMX) += imx6_src.o | ||||
| obj-$(CONFIG_IMX) += imx7_ccm.o | ||||
| obj-$(CONFIG_IMX) += imx2_wdt.o | ||||
| obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o | ||||
| obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o | ||||
| obj-$(CONFIG_MAINSTONE) += mst_fpga.o | ||||
|  | ||||
							
								
								
									
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								hw/misc/imx2_wdt.c
									
									
									
									
									
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								hw/misc/imx2_wdt.c
									
									
									
									
									
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							| @ -0,0 +1,89 @@ | ||||
| /*
 | ||||
|  * Copyright (c) 2018, Impinj, Inc. | ||||
|  * | ||||
|  * i.MX2 Watchdog IP block | ||||
|  * | ||||
|  * Author: Andrey Smirnov <andrew.smirnov@gmail.com> | ||||
|  * | ||||
|  * This work is licensed under the terms of the GNU GPL, version 2 or later. | ||||
|  * See the COPYING file in the top-level directory. | ||||
|  */ | ||||
| 
 | ||||
| #include "qemu/osdep.h" | ||||
| #include "qemu/bitops.h" | ||||
| #include "sysemu/watchdog.h" | ||||
| 
 | ||||
| #include "hw/misc/imx2_wdt.h" | ||||
| 
 | ||||
| #define IMX2_WDT_WCR_WDA    BIT(5)      /* -> External Reset WDOG_B */ | ||||
| #define IMX2_WDT_WCR_SRS    BIT(4)      /* -> Software Reset Signal */ | ||||
| 
 | ||||
| static uint64_t imx2_wdt_read(void *opaque, hwaddr addr, | ||||
|                               unsigned int size) | ||||
| { | ||||
|     return 0; | ||||
| } | ||||
| 
 | ||||
| static void imx2_wdt_write(void *opaque, hwaddr addr, | ||||
|                            uint64_t value, unsigned int size) | ||||
| { | ||||
|     if (addr == IMX2_WDT_WCR && | ||||
|         (value & (IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS))) { | ||||
|         watchdog_perform_action(); | ||||
|     } | ||||
| } | ||||
| 
 | ||||
| static const MemoryRegionOps imx2_wdt_ops = { | ||||
|     .read  = imx2_wdt_read, | ||||
|     .write = imx2_wdt_write, | ||||
|     .endianness = DEVICE_NATIVE_ENDIAN, | ||||
|     .impl = { | ||||
|         /*
 | ||||
|          * Our device would not work correctly if the guest was doing | ||||
|          * unaligned access. This might not be a limitation on the | ||||
|          * real device but in practice there is no reason for a guest | ||||
|          * to access this device unaligned. | ||||
|          */ | ||||
|         .min_access_size = 4, | ||||
|         .max_access_size = 4, | ||||
|         .unaligned = false, | ||||
|     }, | ||||
| }; | ||||
| 
 | ||||
| static void imx2_wdt_realize(DeviceState *dev, Error **errp) | ||||
| { | ||||
|     IMX2WdtState *s = IMX2_WDT(dev); | ||||
| 
 | ||||
|     memory_region_init_io(&s->mmio, OBJECT(dev), | ||||
|                           &imx2_wdt_ops, s, | ||||
|                           TYPE_IMX2_WDT".mmio", | ||||
|                           IMX2_WDT_REG_NUM * sizeof(uint16_t)); | ||||
|     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio); | ||||
| } | ||||
| 
 | ||||
| static void imx2_wdt_class_init(ObjectClass *klass, void *data) | ||||
| { | ||||
|     DeviceClass *dc = DEVICE_CLASS(klass); | ||||
| 
 | ||||
|     dc->realize = imx2_wdt_realize; | ||||
|     set_bit(DEVICE_CATEGORY_MISC, dc->categories); | ||||
| } | ||||
| 
 | ||||
| static const TypeInfo imx2_wdt_info = { | ||||
|     .name          = TYPE_IMX2_WDT, | ||||
|     .parent        = TYPE_SYS_BUS_DEVICE, | ||||
|     .instance_size = sizeof(IMX2WdtState), | ||||
|     .class_init    = imx2_wdt_class_init, | ||||
| }; | ||||
| 
 | ||||
| static WatchdogTimerModel model = { | ||||
|     .wdt_name = "imx2-watchdog", | ||||
|     .wdt_description = "i.MX2 Watchdog", | ||||
| }; | ||||
| 
 | ||||
| static void imx2_wdt_register_type(void) | ||||
| { | ||||
|     watchdog_add_model(&model); | ||||
|     type_register_static(&imx2_wdt_info); | ||||
| } | ||||
| type_init(imx2_wdt_register_type) | ||||
							
								
								
									
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								include/hw/misc/imx2_wdt.h
									
									
									
									
									
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								include/hw/misc/imx2_wdt.h
									
									
									
									
									
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							| @ -0,0 +1,33 @@ | ||||
| /*
 | ||||
|  * Copyright (c) 2017, Impinj, Inc. | ||||
|  * | ||||
|  * i.MX2 Watchdog IP block | ||||
|  * | ||||
|  * Author: Andrey Smirnov <andrew.smirnov@gmail.com> | ||||
|  * | ||||
|  * This work is licensed under the terms of the GNU GPL, version 2 or later. | ||||
|  * See the COPYING file in the top-level directory. | ||||
|  */ | ||||
| 
 | ||||
| #ifndef IMX2_WDT_H | ||||
| #define IMX2_WDT_H | ||||
| 
 | ||||
| #include "hw/sysbus.h" | ||||
| 
 | ||||
| #define TYPE_IMX2_WDT "imx2.wdt" | ||||
| #define IMX2_WDT(obj) OBJECT_CHECK(IMX2WdtState, (obj), TYPE_IMX2_WDT) | ||||
| 
 | ||||
| enum IMX2WdtRegisters { | ||||
|     IMX2_WDT_WCR     = 0x0000, | ||||
|     IMX2_WDT_REG_NUM = 0x0008 / sizeof(uint16_t) + 1, | ||||
| }; | ||||
| 
 | ||||
| 
 | ||||
| typedef struct IMX2WdtState { | ||||
|     /* <private> */ | ||||
|     SysBusDevice parent_obj; | ||||
| 
 | ||||
|     MemoryRegion mmio; | ||||
| } IMX2WdtState; | ||||
| 
 | ||||
| #endif /* IMX7_SNVS_H */ | ||||
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