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lsi: ignore write accesses to CTEST0 registers

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53C895A datasheet says that this register is read/write, and that the value
returned on read access is dependant of DMA FIFO state. However, nothing is
said for written value.

53C810A datasheet gives more insight about this register:
"This was a general purpose read/write register in previous SYM53C8XX
family chips. Although it is still a read/write register, Symbios reserves
the right to use these bits for future 53C8XX family enhancements."

This prevents going to the default case, which prints an error message.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Hervé Poussineau 2013-09-14 17:51:07 +02:00 committed by Paolo Bonzini
parent c7ac9f403a
commit 0903c35dde
1 changed files with 3 additions and 0 deletions
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3
hw/scsi/lsi53c895a.c
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@ -1743,6 +1743,9 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
case 0x17: /* MBOX1 */ case 0x17: /* MBOX1 */
s->mbox1 = val; s->mbox1 = val;
break; break;
case 0x18: /* CTEST0 */
/* nothing to do */
break;
case 0x1a: /* CTEST2 */ case 0x1a: /* CTEST2 */
s->ctest2 = val & LSI_CTEST2_PCICIE; s->ctest2 = val & LSI_CTEST2_PCICIE;
break; break;