cadence_uart: Check if receiver timeout counter is disabled
When register Rcvr_timeout_reg0 (R_RTOR in cadence_uart.c) is set to 0, the receiver timeout counter should be disabled. See page 1801 of "Zynq-7000 AP SoC Technical Reference Manual". This commit adds a such a check before setting the receive timeout interrupt. Signed-off-by: Andrew Gacek <andrew.gacek@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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				| @ -138,9 +138,10 @@ static void fifo_trigger_update(void *opaque) | ||||
| { | ||||
|     CadenceUARTState *s = opaque; | ||||
| 
 | ||||
|     s->r[R_CISR] |= UART_INTR_TIMEOUT; | ||||
| 
 | ||||
|     uart_update_status(s); | ||||
|     if (s->r[R_RTOR]) { | ||||
|         s->r[R_CISR] |= UART_INTR_TIMEOUT; | ||||
|         uart_update_status(s); | ||||
|     } | ||||
| } | ||||
| 
 | ||||
| static void uart_rx_reset(CadenceUARTState *s) | ||||
|  | ||||
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