david.venhoff/QEMU-Nyx-fork
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

pci: Replace pci_add_capability2() with pci_add_capability()

Browse Source 
After the patch 'Make errp the last parameter of pci_add_capability()',
pci_add_capability() and pci_add_capability2() now do exactly the same.
So drop the wrapper pci_add_capability() of pci_add_capability2(), then
replace the pci_add_capability2() with pci_add_capability() everywhere.

Cc: pbonzini@redhat.com
Cc: rth@twiddle.net
Cc: ehabkost@redhat.com
Cc: mst@redhat.com
Cc: dmitry@daynix.com
Cc: jasowang@redhat.com
Cc: marcel@redhat.com
Cc: alex.williamson@redhat.com
Cc: armbru@redhat.com
Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Mao Zhongyi 2017-06-27 14:16:51 +08:00 committed by Michael S. Tsirkin
parent 9a7c2a5970
commit 2784127857
7 changed files with 15 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
hw/i386/kvm/pci-assign.c
View File

@ -1254,7 +1254,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
dev->dev.cap_present |= QEMU_PCI_CAP_MSI; dev->dev.cap_present |= QEMU_PCI_CAP_MSI;
dev->cap.available |= ASSIGNED_DEVICE_CAP_MSI; dev->cap.available |= ASSIGNED_DEVICE_CAP_MSI;
/* Only 32-bit/no-mask currently supported */ /* Only 32-bit/no-mask currently supported */
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_MSI, pos, 10, ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSI, pos, 10,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
@ -1288,7 +1288,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
} }
dev->dev.cap_present |= QEMU_PCI_CAP_MSIX; dev->dev.cap_present |= QEMU_PCI_CAP_MSIX;
dev->cap.available |= ASSIGNED_DEVICE_CAP_MSIX; dev->cap.available |= ASSIGNED_DEVICE_CAP_MSIX;
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_MSIX, pos, 12, ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSIX, pos, 12,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
@ -1318,7 +1318,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
if (pos) { if (pos) {
uint16_t pmc; uint16_t pmc;
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_PM, pos, PCI_PM_SIZEOF, ret = pci_add_capability(pci_dev, PCI_CAP_ID_PM, pos, PCI_PM_SIZEOF,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
@ -1386,7 +1386,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
return -EINVAL; return -EINVAL;
} }
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_EXP, pos, size, ret = pci_add_capability(pci_dev, PCI_CAP_ID_EXP, pos, size,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
@ -1462,7 +1462,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
uint32_t status; uint32_t status;
/* Only expose the minimum, 8 byte capability */ /* Only expose the minimum, 8 byte capability */
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_PCIX, pos, 8, ret = pci_add_capability(pci_dev, PCI_CAP_ID_PCIX, pos, 8,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
@ -1490,7 +1490,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_VPD, 0); pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_VPD, 0);
if (pos) { if (pos) {
/* Direct R/W passthrough */ /* Direct R/W passthrough */
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_VPD, pos, 8, ret = pci_add_capability(pci_dev, PCI_CAP_ID_VPD, pos, 8,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
@ -1508,7 +1508,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp)
pos += PCI_CAP_LIST_NEXT) { pos += PCI_CAP_LIST_NEXT) {
uint8_t len = pci_get_byte(pci_dev->config + pos + PCI_CAP_FLAGS); uint8_t len = pci_get_byte(pci_dev->config + pos + PCI_CAP_FLAGS);
/* Direct R/W passthrough */ /* Direct R/W passthrough */
ret = pci_add_capability2(pci_dev, PCI_CAP_ID_VNDR, pos, len, ret = pci_add_capability(pci_dev, PCI_CAP_ID_VNDR, pos, len,
&local_err); &local_err);
if (ret < 0) { if (ret < 0) {
error_propagate(errp, local_err); error_propagate(errp, local_err);

2
hw/ide/ich.c
View File

@ -130,7 +130,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp)
pci_register_bar(dev, ICH9_MEM_BAR, PCI_BASE_ADDRESS_SPACE_MEMORY, pci_register_bar(dev, ICH9_MEM_BAR, PCI_BASE_ADDRESS_SPACE_MEMORY,
&d->ahci.mem); &d->ahci.mem);
sata_cap_offset = pci_add_capability2(dev, PCI_CAP_ID_SATA, sata_cap_offset = pci_add_capability(dev, PCI_CAP_ID_SATA,
ICH9_SATA_CAP_OFFSET, SATA_CAP_SIZE, ICH9_SATA_CAP_OFFSET, SATA_CAP_SIZE,
errp); errp);
if (sata_cap_offset < 0) { if (sata_cap_offset < 0) {

2
hw/pci/msi.c
View File

@ -216,7 +216,7 @@ int msi_init(struct PCIDevice *dev, uint8_t offset,
} }
cap_size = msi_cap_sizeof(flags); cap_size = msi_cap_sizeof(flags);
config_offset = pci_add_capability2(dev, PCI_CAP_ID_MSI, offset, config_offset = pci_add_capability(dev, PCI_CAP_ID_MSI, offset,
cap_size, errp); cap_size, errp);
if (config_offset < 0) { if (config_offset < 0) {
return config_offset; return config_offset;

2
hw/pci/msix.c
View File

@ -301,7 +301,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries,
return -EINVAL; return -EINVAL;
} }
cap = pci_add_capability2(dev, PCI_CAP_ID_MSIX, cap = pci_add_capability(dev, PCI_CAP_ID_MSIX,
cap_pos, MSIX_CAP_LENGTH, errp); cap_pos, MSIX_CAP_LENGTH, errp);
if (cap < 0) { if (cap < 0) {
return cap; return cap;

20
hw/pci/pci.c
View File

@ -2259,28 +2259,12 @@ static void pci_del_option_rom(PCIDevice *pdev)
} }
/* /*
* if offset = 0, * On success, pci_add_capability() returns a positive value
* Find and reserve space and add capability to the linked list
* in pci config space
*/
int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
uint8_t offset, uint8_t size,
Error **errp)
{
int ret;
ret = pci_add_capability2(pdev, cap_id, offset, size, errp);
return ret;
}
/*
* On success, pci_add_capability2() returns a positive value
* that the offset of the pci capability. * that the offset of the pci capability.
* On failure, it sets an error and returns a negative error * On failure, it sets an error and returns a negative error
* code. * code.
*/ */
int pci_add_capability2(PCIDevice *pdev, uint8_t cap_id, int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
uint8_t offset, uint8_t size, uint8_t offset, uint8_t size,
Error **errp) Error **errp)
{ {

6
hw/vfio/pci.c
View File

@ -1837,14 +1837,14 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
case PCI_CAP_ID_PM: case PCI_CAP_ID_PM:
vfio_check_pm_reset(vdev, pos); vfio_check_pm_reset(vdev, pos);
vdev->pm_cap = pos; vdev->pm_cap = pos;
ret = pci_add_capability2(pdev, cap_id, pos, size, errp); ret = pci_add_capability(pdev, cap_id, pos, size, errp);
break; break;
case PCI_CAP_ID_AF: case PCI_CAP_ID_AF:
vfio_check_af_flr(vdev, pos); vfio_check_af_flr(vdev, pos);
ret = pci_add_capability2(pdev, cap_id, pos, size, errp); ret = pci_add_capability(pdev, cap_id, pos, size, errp);
break; break;
default: default:
ret = pci_add_capability2(pdev, cap_id, pos, size, errp); ret = pci_add_capability(pdev, cap_id, pos, size, errp);
break; break;
} }
out: out:

3
include/hw/pci/pci.h
View File

@ -358,9 +358,6 @@ pcibus_t pci_get_bar_addr(PCIDevice *pci_dev, int region_num);
int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
uint8_t offset, uint8_t size, uint8_t offset, uint8_t size,
Error **errp); Error **errp);
int pci_add_capability2(PCIDevice *pdev, uint8_t cap_id,
uint8_t offset, uint8_t size,
Error **errp);
void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size); void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);