target-microblaze: Use cpu_exec_interrupt qom hook
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 1410626734-3804-20-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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				@ -505,15 +505,6 @@ int cpu_exec(CPUArchState *env)
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                        cc->do_interrupt(cpu);
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					                        cc->do_interrupt(cpu);
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                        next_tb = 0;
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					                        next_tb = 0;
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                    }
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					                    }
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#elif defined(TARGET_MICROBLAZE)
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                    if ((interrupt_request & CPU_INTERRUPT_HARD)
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                        && (env->sregs[SR_MSR] & MSR_IE)
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                        && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP))
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                        && !(env->iflags & (D_FLAG | IMM_FLAG))) {
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                        cpu->exception_index = EXCP_IRQ;
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                        cc->do_interrupt(cpu);
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                        next_tb = 0;
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                    }
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#endif
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					#endif
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                    /* The target hook has 3 exit conditions:
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					                    /* The target hook has 3 exit conditions:
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                       False when the interrupt isn't processed,
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					                       False when the interrupt isn't processed,
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@ -72,6 +72,7 @@ static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env)
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#define ENV_OFFSET offsetof(MicroBlazeCPU, env)
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					#define ENV_OFFSET offsetof(MicroBlazeCPU, env)
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void mb_cpu_do_interrupt(CPUState *cs);
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					void mb_cpu_do_interrupt(CPUState *cs);
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					bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
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void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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					void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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                       int flags);
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					                       int flags);
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hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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					hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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@ -169,6 +169,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
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    cc->has_work = mb_cpu_has_work;
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					    cc->has_work = mb_cpu_has_work;
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    cc->do_interrupt = mb_cpu_do_interrupt;
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					    cc->do_interrupt = mb_cpu_do_interrupt;
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					    cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
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    cc->dump_state = mb_cpu_dump_state;
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					    cc->dump_state = mb_cpu_dump_state;
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    cc->set_pc = mb_cpu_set_pc;
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					    cc->set_pc = mb_cpu_set_pc;
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    cc->gdb_read_register = mb_cpu_gdb_read_register;
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					    cc->gdb_read_register = mb_cpu_gdb_read_register;
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@ -286,3 +286,19 @@ hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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    return paddr;
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					    return paddr;
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}
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					}
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#endif
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					#endif
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					bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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					{
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					    MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
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					    CPUMBState *env = &cpu->env;
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					    if ((interrupt_request & CPU_INTERRUPT_HARD)
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					        && (env->sregs[SR_MSR] & MSR_IE)
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					        && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP))
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					        && !(env->iflags & (D_FLAG | IMM_FLAG))) {
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					        cs->exception_index = EXCP_IRQ;
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					        mb_cpu_do_interrupt(cs);
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					        return true;
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					    }
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					    return false;
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					}
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