target-arm: Implement missing EL2 TLBI operations
Implement the missing TLBI operations that exist only if EL2 is implemented. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1439548879-1972-5-git-send-email-peter.maydell@linaro.org
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				@ -2591,6 +2591,16 @@ static void tlbi_aa64_alle1is_write(CPUARMState *env, const ARMCPRegInfo *ri,
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    }
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					    }
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}
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					}
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					static void tlbi_aa64_alle2is_write(CPUARMState *env, const ARMCPRegInfo *ri,
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					                                    uint64_t value)
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					{
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					    CPUState *other_cs;
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					    CPU_FOREACH(other_cs) {
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					        tlb_flush_by_mmuidx(other_cs, ARMMMUIdx_S1E2, -1);
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					    }
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					}
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static void tlbi_aa64_vae1_write(CPUARMState *env, const ARMCPRegInfo *ri,
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					static void tlbi_aa64_vae1_write(CPUARMState *env, const ARMCPRegInfo *ri,
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                                 uint64_t value)
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					                                 uint64_t value)
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{
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					{
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@ -3146,10 +3156,22 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
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      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 1,
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					      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 1,
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      .type = ARM_CP_NO_RAW, .access = PL2_W,
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					      .type = ARM_CP_NO_RAW, .access = PL2_W,
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      .writefn = tlbi_aa64_vae2_write },
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					      .writefn = tlbi_aa64_vae2_write },
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					    { .name = "TLBI_VALE2", .state = ARM_CP_STATE_AA64,
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					      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 5,
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					      .access = PL2_W, .type = ARM_CP_NO_RAW,
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					      .writefn = tlbi_aa64_vae2_write },
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					    { .name = "TLBI_ALLE2IS", .state = ARM_CP_STATE_AA64,
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					      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 0,
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					      .access = PL2_W, .type = ARM_CP_NO_RAW,
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					      .writefn = tlbi_aa64_alle2is_write },
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    { .name = "TLBI_VAE2IS", .state = ARM_CP_STATE_AA64,
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					    { .name = "TLBI_VAE2IS", .state = ARM_CP_STATE_AA64,
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      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 1,
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					      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 1,
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      .type = ARM_CP_NO_RAW, .access = PL2_W,
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					      .type = ARM_CP_NO_RAW, .access = PL2_W,
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      .writefn = tlbi_aa64_vae2is_write },
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					      .writefn = tlbi_aa64_vae2is_write },
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					    { .name = "TLBI_VALE2IS", .state = ARM_CP_STATE_AA64,
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					      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 5,
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					      .access = PL2_W, .type = ARM_CP_NO_RAW,
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					      .writefn = tlbi_aa64_vae2is_write },
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#ifndef CONFIG_USER_ONLY
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					#ifndef CONFIG_USER_ONLY
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    /* Unlike the other EL2-related AT operations, these must
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					    /* Unlike the other EL2-related AT operations, these must
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     * UNDEF from EL3 if EL2 is not implemented, which is why we
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					     * UNDEF from EL3 if EL2 is not implemented, which is why we
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