Add stream ID to MSI write
GICv3 ITS distinguishes between devices by using hardwired device IDs passed on the bus. This patch implements passing these IDs in qemu. SMMU is also known to use stream IDs, therefore this addition can also be useful for implementing platforms with SMMU. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Changes from v1: - Added bus number to the stream ID - Added stream ID not only to MSI-X, but also to plain MSI. Some common code was made into msi_send_message() function. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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								hw/pci/msi.c
									
									
									
									
									
								
							
							
						
						
									
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								hw/pci/msi.c
									
									
									
									
									
								
							| @ -291,8 +291,16 @@ void msi_notify(PCIDevice *dev, unsigned int vector) | ||||
|                    "notify vector 0x%x" | ||||
|                    " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", | ||||
|                    vector, msg.address, msg.data); | ||||
|     msi_send_message(dev, msg); | ||||
| } | ||||
| 
 | ||||
| void msi_send_message(PCIDevice *dev, MSIMessage msg) | ||||
| { | ||||
|     MemTxAttrs attrs = {}; | ||||
| 
 | ||||
|     attrs.stream_id = (pci_bus_num(dev->bus) << 8) | dev->devfn; | ||||
|     address_space_stl_le(&dev->bus_master_as, msg.address, msg.data, | ||||
|                          MEMTXATTRS_UNSPECIFIED, NULL); | ||||
|                          attrs, NULL); | ||||
| } | ||||
| 
 | ||||
| /* Normally called by pci_default_write_config(). */ | ||||
|  | ||||
| @ -443,8 +443,7 @@ void msix_notify(PCIDevice *dev, unsigned vector) | ||||
| 
 | ||||
|     msg = msix_get_message(dev, vector); | ||||
| 
 | ||||
|     address_space_stl_le(&dev->bus_master_as, msg.address, msg.data, | ||||
|                          MEMTXATTRS_UNSPECIFIED, NULL); | ||||
|     msi_send_message(dev, msg); | ||||
| } | ||||
| 
 | ||||
| void msix_reset(PCIDevice *dev) | ||||
|  | ||||
| @ -33,6 +33,8 @@ typedef struct MemTxAttrs { | ||||
|     unsigned int secure:1; | ||||
|     /* Memory access is usermode (unprivileged) */ | ||||
|     unsigned int user:1; | ||||
|     /* Stream ID (for MSI for example) */ | ||||
|     unsigned int stream_id:16; | ||||
| } MemTxAttrs; | ||||
| 
 | ||||
| /* Bus masters which don't specify any attributes will get this,
 | ||||
|  | ||||
| @ -39,6 +39,7 @@ int msi_init(struct PCIDevice *dev, uint8_t offset, | ||||
| void msi_uninit(struct PCIDevice *dev); | ||||
| void msi_reset(PCIDevice *dev); | ||||
| void msi_notify(PCIDevice *dev, unsigned int vector); | ||||
| void msi_send_message(PCIDevice *dev, MSIMessage msg); | ||||
| void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len); | ||||
| unsigned int msi_nr_vectors_allocated(const PCIDevice *dev); | ||||
| 
 | ||||
|  | ||||
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