david.venhoff/QEMU-Nyx-fork
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

target/xtensa: Convert to DisasContextBase

Browse Source 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Richard Henderson 2018-05-12 10:57:22 -07:00 committed by Max Filippov
parent f3531da588
commit 3cc18eec0a
1 changed files with 44 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

91
target/xtensa/translate.c
View File

@ -48,16 +48,13 @@
struct DisasContext { struct DisasContext {
DisasContextBase base;
const XtensaConfig *config; const XtensaConfig *config;
TranslationBlock *tb;
uint32_t pc; uint32_t pc;
uint32_t next_pc;
int cring; int cring;
int ring; int ring;
uint32_t lbeg; uint32_t lbeg;
uint32_t lend; uint32_t lend;
int is_jmp;
int singlestep_enabled;
bool sar_5bit; bool sar_5bit;
bool sar_m32_5bit; bool sar_m32_5bit;
@ -314,7 +311,7 @@ static void gen_exception_cause(DisasContext *dc, uint32_t cause)
tcg_temp_free(tcause); tcg_temp_free(tcause);
if (cause == ILLEGAL_INSTRUCTION_CAUSE || if (cause == ILLEGAL_INSTRUCTION_CAUSE ||
cause == SYSCALL_CAUSE) { cause == SYSCALL_CAUSE) {
dc->is_jmp = DISAS_NORETURN; dc->base.is_jmp = DISAS_NORETURN;
} }
} }
@ -336,7 +333,7 @@ static void gen_debug_exception(DisasContext *dc, uint32_t cause)
tcg_temp_free(tpc); tcg_temp_free(tpc);
tcg_temp_free(tcause); tcg_temp_free(tcause);
if (cause & (DEBUGCAUSE_IB | DEBUGCAUSE_BI | DEBUGCAUSE_BN)) { if (cause & (DEBUGCAUSE_IB | DEBUGCAUSE_BI | DEBUGCAUSE_BN)) {
dc->is_jmp = DISAS_NORETURN; dc->base.is_jmp = DISAS_NORETURN;
} }
} }
@ -348,7 +345,7 @@ static bool gen_check_privilege(DisasContext *dc)
} }
#endif #endif
gen_exception_cause(dc, PRIVILEGED_CAUSE); gen_exception_cause(dc, PRIVILEGED_CAUSE);
dc->is_jmp = DISAS_NORETURN; dc->base.is_jmp = DISAS_NORETURN;
return false; return false;
} }
@ -357,7 +354,7 @@ static bool gen_check_cpenable(DisasContext *dc, unsigned cp)
if (option_enabled(dc, XTENSA_OPTION_COPROCESSOR) && if (option_enabled(dc, XTENSA_OPTION_COPROCESSOR) &&
!(dc->cpenable & (1 << cp))) { !(dc->cpenable & (1 << cp))) {
gen_exception_cause(dc, COPROCESSOR0_DISABLED + cp); gen_exception_cause(dc, COPROCESSOR0_DISABLED + cp);
dc->is_jmp = DISAS_NORETURN; dc->base.is_jmp = DISAS_NORETURN;
return false; return false;
} }
return true; return true;
@ -369,17 +366,17 @@ static void gen_jump_slot(DisasContext *dc, TCGv dest, int slot)
if (dc->icount) { if (dc->icount) {
tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount); tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount);
} }
if (dc->singlestep_enabled) { if (dc->base.singlestep_enabled) {
gen_exception(dc, EXCP_DEBUG); gen_exception(dc, EXCP_DEBUG);
} else { } else {
if (slot >= 0) { if (slot >= 0) {
tcg_gen_goto_tb(slot); tcg_gen_goto_tb(slot);
tcg_gen_exit_tb(dc->tb, slot); tcg_gen_exit_tb(dc->base.tb, slot);
} else { } else {
tcg_gen_exit_tb(NULL, 0); tcg_gen_exit_tb(NULL, 0);
} }
} }
dc->is_jmp = DISAS_NORETURN; dc->base.is_jmp = DISAS_NORETURN;
} }
static void gen_jump(DisasContext *dc, TCGv dest) static void gen_jump(DisasContext *dc, TCGv dest)
@ -391,7 +388,7 @@ static void gen_jumpi(DisasContext *dc, uint32_t dest, int slot)
{ {
TCGv_i32 tmp = tcg_const_i32(dest); TCGv_i32 tmp = tcg_const_i32(dest);
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
if (((dc->tb->pc ^ dest) & TARGET_PAGE_MASK) != 0) { if (((dc->base.pc_first ^ dest) & TARGET_PAGE_MASK) != 0) {
slot = -1; slot = -1;
} }
#endif #endif
@ -408,7 +405,7 @@ static void gen_callw_slot(DisasContext *dc, int callinc, TCGv_i32 dest,
tcallinc, PS_CALLINC_SHIFT, PS_CALLINC_LEN); tcallinc, PS_CALLINC_SHIFT, PS_CALLINC_LEN);
tcg_temp_free(tcallinc); tcg_temp_free(tcallinc);
tcg_gen_movi_i32(cpu_R[callinc << 2], tcg_gen_movi_i32(cpu_R[callinc << 2],
(callinc << 30) | (dc->next_pc & 0x3fffffff)); (callinc << 30) | (dc->base.pc_next & 0x3fffffff));
gen_jump_slot(dc, dest, slot); gen_jump_slot(dc, dest, slot);
} }
@ -421,7 +418,7 @@ static void gen_callwi(DisasContext *dc, int callinc, uint32_t dest, int slot)
{ {
TCGv_i32 tmp = tcg_const_i32(dest); TCGv_i32 tmp = tcg_const_i32(dest);
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
if (((dc->tb->pc ^ dest) & TARGET_PAGE_MASK) != 0) { if (((dc->base.pc_first ^ dest) & TARGET_PAGE_MASK) != 0) {
slot = -1; slot = -1;
} }
#endif #endif
@ -432,15 +429,15 @@ static void gen_callwi(DisasContext *dc, int callinc, uint32_t dest, int slot)
static bool gen_check_loop_end(DisasContext *dc, int slot) static bool gen_check_loop_end(DisasContext *dc, int slot)
{ {
if (option_enabled(dc, XTENSA_OPTION_LOOP) && if (option_enabled(dc, XTENSA_OPTION_LOOP) &&
!(dc->tb->flags & XTENSA_TBFLAG_EXCM) && !(dc->base.tb->flags & XTENSA_TBFLAG_EXCM) &&
dc->next_pc == dc->lend) { dc->base.pc_next == dc->lend) {
TCGLabel *label = gen_new_label(); TCGLabel *label = gen_new_label();
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label); tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label);
tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1); tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1);
gen_jumpi(dc, dc->lbeg, slot); gen_jumpi(dc, dc->lbeg, slot);
gen_set_label(label); gen_set_label(label);
gen_jumpi(dc, dc->next_pc, -1); gen_jumpi(dc, dc->base.pc_next, -1);
return true; return true;
} }
return false; return false;
@ -449,7 +446,7 @@ static bool gen_check_loop_end(DisasContext *dc, int slot)
static void gen_jumpi_check_loop_end(DisasContext *dc, int slot) static void gen_jumpi_check_loop_end(DisasContext *dc, int slot)
{ {
if (!gen_check_loop_end(dc, slot)) { if (!gen_check_loop_end(dc, slot)) {
gen_jumpi(dc, dc->next_pc, slot); gen_jumpi(dc, dc->base.pc_next, slot);
} }
} }
@ -500,12 +497,12 @@ static bool gen_check_sr(DisasContext *dc, uint32_t sr, unsigned access)
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static bool gen_rsr_ccount(DisasContext *dc, TCGv_i32 d, uint32_t sr) static bool gen_rsr_ccount(DisasContext *dc, TCGv_i32 d, uint32_t sr)
{ {
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_start(); gen_io_start();
} }
gen_helper_update_ccount(cpu_env); gen_helper_update_ccount(cpu_env);
tcg_gen_mov_i32(d, cpu_SR[sr]); tcg_gen_mov_i32(d, cpu_SR[sr]);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_end(); gen_io_end();
return true; return true;
} }
@ -689,11 +686,11 @@ static bool gen_wsr_cpenable(DisasContext *dc, uint32_t sr, TCGv_i32 v)
static void gen_check_interrupts(DisasContext *dc) static void gen_check_interrupts(DisasContext *dc)
{ {
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_start(); gen_io_start();
} }
gen_helper_check_interrupts(cpu_env); gen_helper_check_interrupts(cpu_env);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_end(); gen_io_end();
} }
} }
@ -747,11 +744,11 @@ static bool gen_wsr_ps(DisasContext *dc, uint32_t sr, TCGv_i32 v)
static bool gen_wsr_ccount(DisasContext *dc, uint32_t sr, TCGv_i32 v) static bool gen_wsr_ccount(DisasContext *dc, uint32_t sr, TCGv_i32 v)
{ {
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_start(); gen_io_start();
} }
gen_helper_wsr_ccount(cpu_env, v); gen_helper_wsr_ccount(cpu_env, v);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_end(); gen_io_end();
gen_jumpi_check_loop_end(dc, 0); gen_jumpi_check_loop_end(dc, 0);
return true; return true;
@ -788,11 +785,11 @@ static bool gen_wsr_ccompare(DisasContext *dc, uint32_t sr, TCGv_i32 v)
tcg_gen_mov_i32(cpu_SR[sr], v); tcg_gen_mov_i32(cpu_SR[sr], v);
tcg_gen_andi_i32(cpu_SR[INTSET], cpu_SR[INTSET], ~int_bit); tcg_gen_andi_i32(cpu_SR[INTSET], cpu_SR[INTSET], ~int_bit);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_start(); gen_io_start();
} }
gen_helper_update_ccompare(cpu_env, tmp); gen_helper_update_ccompare(cpu_env, tmp);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_end(); gen_io_end();
gen_jumpi_check_loop_end(dc, 0); gen_jumpi_check_loop_end(dc, 0);
ret = true; ret = true;
@ -892,14 +889,14 @@ static void gen_load_store_alignment(DisasContext *dc, int shift,
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static void gen_waiti(DisasContext *dc, uint32_t imm4) static void gen_waiti(DisasContext *dc, uint32_t imm4)
{ {
TCGv_i32 pc = tcg_const_i32(dc->next_pc); TCGv_i32 pc = tcg_const_i32(dc->base.pc_next);
TCGv_i32 intlevel = tcg_const_i32(imm4); TCGv_i32 intlevel = tcg_const_i32(imm4);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_start(); gen_io_start();
} }
gen_helper_waiti(cpu_env, pc, intlevel); gen_helper_waiti(cpu_env, pc, intlevel);
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
gen_io_end(); gen_io_end();
} }
tcg_temp_free(pc); tcg_temp_free(pc);
@ -915,7 +912,7 @@ static bool gen_window_check1(DisasContext *dc, unsigned r1)
TCGv_i32 w = tcg_const_i32(r1 / 4); TCGv_i32 w = tcg_const_i32(r1 / 4);
gen_helper_window_check(cpu_env, pc, w); gen_helper_window_check(cpu_env, pc, w);
dc->is_jmp = DISAS_NORETURN; dc->base.is_jmp = DISAS_NORETURN;
return false; return false;
} }
return true; return true;
@ -966,10 +963,10 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
return; return;
} }
dc->next_pc = dc->pc + len; dc->base.pc_next = dc->pc + len;
if (xtensa_option_enabled(dc->config, XTENSA_OPTION_LOOP) && if (xtensa_option_enabled(dc->config, XTENSA_OPTION_LOOP) &&
dc->lbeg == dc->pc && dc->lbeg == dc->pc &&
((dc->pc ^ (dc->next_pc - 1)) & -dc->config->inst_fetch_width)) { ((dc->pc ^ (dc->base.pc_next - 1)) & -dc->config->inst_fetch_width)) {
qemu_log_mask(LOG_GUEST_ERROR, qemu_log_mask(LOG_GUEST_ERROR,
"unaligned first instruction of a loop (pc = %08x)\n", "unaligned first instruction of a loop (pc = %08x)\n",
dc->pc); dc->pc);
@ -1033,10 +1030,10 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
return; return;
} }
} }
if (dc->is_jmp == DISAS_NEXT) { if (dc->base.is_jmp == DISAS_NEXT) {
gen_check_loop_end(dc, 0); gen_check_loop_end(dc, 0);
} }
dc->pc = dc->next_pc; dc->pc = dc->base.pc_next;
} }
static inline unsigned xtensa_insn_len(CPUXtensaState *env, DisasContext *dc) static inline unsigned xtensa_insn_len(CPUXtensaState *env, DisasContext *dc)
@ -1075,14 +1072,14 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
} }
dc.config = env->config; dc.config = env->config;
dc.singlestep_enabled = cs->singlestep_enabled; dc.base.singlestep_enabled = cs->singlestep_enabled;
dc.tb = tb; dc.base.tb = tb;
dc.pc = pc_start; dc.pc = pc_start;
dc.ring = tb->flags & XTENSA_TBFLAG_RING_MASK; dc.ring = tb->flags & XTENSA_TBFLAG_RING_MASK;
dc.cring = (tb->flags & XTENSA_TBFLAG_EXCM) ? 0 : dc.ring; dc.cring = (tb->flags & XTENSA_TBFLAG_EXCM) ? 0 : dc.ring;
dc.lbeg = env->sregs[LBEG]; dc.lbeg = env->sregs[LBEG];
dc.lend = env->sregs[LEND]; dc.lend = env->sregs[LEND];
dc.is_jmp = DISAS_NEXT; dc.base.is_jmp = DISAS_NEXT;
dc.debug = tb->flags & XTENSA_TBFLAG_DEBUG; dc.debug = tb->flags & XTENSA_TBFLAG_DEBUG;
dc.icount = tb->flags & XTENSA_TBFLAG_ICOUNT; dc.icount = tb->flags & XTENSA_TBFLAG_ICOUNT;
dc.cpenable = (tb->flags & XTENSA_TBFLAG_CPENABLE_MASK) >> dc.cpenable = (tb->flags & XTENSA_TBFLAG_CPENABLE_MASK) >>
@ -1107,14 +1104,14 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
tcg_gen_insn_start(dc.pc); tcg_gen_insn_start(dc.pc);
++insn_count; ++insn_count;
gen_exception(&dc, EXCP_YIELD); gen_exception(&dc, EXCP_YIELD);
dc.is_jmp = DISAS_NORETURN; dc.base.is_jmp = DISAS_NORETURN;
goto done; goto done;
} }
if (tb->flags & XTENSA_TBFLAG_EXCEPTION) { if (tb->flags & XTENSA_TBFLAG_EXCEPTION) {
tcg_gen_insn_start(dc.pc); tcg_gen_insn_start(dc.pc);
++insn_count; ++insn_count;
gen_exception(&dc, EXCP_DEBUG); gen_exception(&dc, EXCP_DEBUG);
dc.is_jmp = DISAS_NORETURN; dc.base.is_jmp = DISAS_NORETURN;
goto done; goto done;
} }
@ -1125,7 +1122,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
if (unlikely(cpu_breakpoint_test(cs, dc.pc, BP_ANY))) { if (unlikely(cpu_breakpoint_test(cs, dc.pc, BP_ANY))) {
tcg_gen_movi_i32(cpu_pc, dc.pc); tcg_gen_movi_i32(cpu_pc, dc.pc);
gen_exception(&dc, EXCP_DEBUG); gen_exception(&dc, EXCP_DEBUG);
dc.is_jmp = DISAS_NORETURN; dc.base.is_jmp = DISAS_NORETURN;
/* The address covered by the breakpoint must be included in /* The address covered by the breakpoint must be included in
[tb->pc, tb->pc + tb->size) in order to for it to be [tb->pc, tb->pc + tb->size) in order to for it to be
properly cleared -- thus we increment the PC here so that properly cleared -- thus we increment the PC here so that
@ -1163,7 +1160,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
gen_exception(&dc, EXCP_DEBUG); gen_exception(&dc, EXCP_DEBUG);
break; break;
} }
} while (dc.is_jmp == DISAS_NEXT && } while (dc.base.is_jmp == DISAS_NEXT &&
insn_count < max_insns && insn_count < max_insns &&
dc.pc - page_start < TARGET_PAGE_SIZE && dc.pc - page_start < TARGET_PAGE_SIZE &&
dc.pc - page_start + xtensa_insn_len(env, &dc) <= TARGET_PAGE_SIZE dc.pc - page_start + xtensa_insn_len(env, &dc) <= TARGET_PAGE_SIZE
@ -1182,7 +1179,7 @@ done:
gen_io_end(); gen_io_end();
} }
if (dc.is_jmp == DISAS_NEXT) { if (dc.base.is_jmp == DISAS_NEXT) {
gen_jumpi(&dc, dc.pc, 0); gen_jumpi(&dc, dc.pc, 0);
} }
gen_tb_end(tb, insn_count); gen_tb_end(tb, insn_count);
@ -1485,7 +1482,7 @@ static void translate_break(DisasContext *dc, const uint32_t arg[],
static void translate_call0(DisasContext *dc, const uint32_t arg[], static void translate_call0(DisasContext *dc, const uint32_t arg[],
const uint32_t par[]) const uint32_t par[])
{ {
tcg_gen_movi_i32(cpu_R[0], dc->next_pc); tcg_gen_movi_i32(cpu_R[0], dc->base.pc_next);
gen_jumpi(dc, arg[0], 0); gen_jumpi(dc, arg[0], 0);
} }
@ -1503,7 +1500,7 @@ static void translate_callx0(DisasContext *dc, const uint32_t arg[],
if (gen_window_check1(dc, arg[0])) { if (gen_window_check1(dc, arg[0])) {
TCGv_i32 tmp = tcg_temp_new_i32(); TCGv_i32 tmp = tcg_temp_new_i32();
tcg_gen_mov_i32(tmp, cpu_R[arg[0]]); tcg_gen_mov_i32(tmp, cpu_R[arg[0]]);
tcg_gen_movi_i32(cpu_R[0], dc->next_pc); tcg_gen_movi_i32(cpu_R[0], dc->base.pc_next);
gen_jump(dc, tmp); gen_jump(dc, tmp);
tcg_temp_free(tmp); tcg_temp_free(tmp);
} }
@ -1703,7 +1700,7 @@ static void translate_l32r(DisasContext *dc, const uint32_t arg[],
if (gen_window_check1(dc, arg[0])) { if (gen_window_check1(dc, arg[0])) {
TCGv_i32 tmp; TCGv_i32 tmp;
if (dc->tb->flags & XTENSA_TBFLAG_LITBASE) { if (dc->base.tb->flags & XTENSA_TBFLAG_LITBASE) {
tmp = tcg_const_i32(dc->raw_arg[1] - 1); tmp = tcg_const_i32(dc->raw_arg[1] - 1);
tcg_gen_add_i32(tmp, cpu_SR[LITBASE], tmp); tcg_gen_add_i32(tmp, cpu_SR[LITBASE], tmp);
} else { } else {
@ -1722,7 +1719,7 @@ static void translate_loop(DisasContext *dc, const uint32_t arg[],
TCGv_i32 tmp = tcg_const_i32(lend); TCGv_i32 tmp = tcg_const_i32(lend);
tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_R[arg[0]], 1); tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_R[arg[0]], 1);
tcg_gen_movi_i32(cpu_SR[LBEG], dc->next_pc); tcg_gen_movi_i32(cpu_SR[LBEG], dc->base.pc_next);
gen_helper_wsr_lend(cpu_env, tmp); gen_helper_wsr_lend(cpu_env, tmp);
tcg_temp_free(tmp); tcg_temp_free(tmp);
@ -1733,7 +1730,7 @@ static void translate_loop(DisasContext *dc, const uint32_t arg[],
gen_set_label(label); gen_set_label(label);
} }
gen_jumpi(dc, dc->next_pc, 0); gen_jumpi(dc, dc->base.pc_next, 0);
} }
} }