Fix malta emulation for 64bit qemu.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2355 c046a42c-6fe2-441c-8c8c-71466251a162
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				@ -24,16 +24,21 @@
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#include "vl.h"
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#define BIOS_FILENAME           "mips_bios.bin"
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#ifdef MIPS_HAS_MIPS64
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#define INITRD_LOAD_ADDR 	(uint64_t)0x80800000
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#define ENVP_ADDR        	(uint64_t)0x80002000
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#ifdef TARGET_WORDS_BIGENDIAN
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#define BIOS_FILENAME "mips_bios.bin"
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#else
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#define INITRD_LOAD_ADDR 	(uint32_t)0x80800000
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#define ENVP_ADDR        	(uint32_t)0x80002000
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#define BIOS_FILENAME "mipsel_bios.bin"
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#endif
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#define VIRT_TO_PHYS_ADDEND 	(-((uint64_t)(uint32_t)0x80000000))
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#ifdef MIPS_HAS_MIPS64
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#define INITRD_LOAD_ADDR 	(int64_t)0x80800000
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#define ENVP_ADDR        	(int64_t)0x80002000
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#else
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#define INITRD_LOAD_ADDR 	(int32_t)0x80800000
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#define ENVP_ADDR        	(int32_t)0x80002000
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#endif
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#define VIRT_TO_PHYS_ADDEND 	(-((int64_t)(int32_t)0x80000000))
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#define ENVP_NB_ENTRIES	 	16
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#define ENVP_ENTRY_SIZE	 	256
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@ -156,7 +161,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
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    default:
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#if 0
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        printf ("malta_fpga_read: Bad register offset 0x%x\n", (int)addr);
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        printf ("malta_fpga_read: Bad register offset 0x" TLSZ "\n",
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		addr);
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#endif
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        break;
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    }
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@ -239,7 +245,8 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
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    default:
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#if 0
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        printf ("malta_fpga_write: Bad register offset 0x%x\n", (int)addr);
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        printf ("malta_fpga_write: Bad register offset 0x" TLSZ "\n",
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		addr);
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#endif
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        break;
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    }
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@ -458,7 +465,7 @@ static int64_t load_kernel (CPUState *env)
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    /* Store command line.  */
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    prom_set(index++, env->kernel_filename);
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    if (initrd_size > 0)
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        prom_set(index++, "rd_start=0x%08x rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline);
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        prom_set(index++, "rd_start=0x" TLSZ " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline);
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    else
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        prom_set(index++, env->kernel_cmdline);
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@ -14,7 +14,7 @@
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#else
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#define BIOS_FILENAME "mipsel_bios.bin"
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#endif
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//#define BIOS_FILENAME "system.bin"
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#ifdef MIPS_HAS_MIPS64
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#define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000
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#else
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@ -112,8 +112,8 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
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        strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
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    }
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    *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
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    *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
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    *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
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    *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
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}
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static void main_cpu_reset(void *opaque)
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@ -159,7 +159,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
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    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
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    bios_size = load_image(buf, phys_ram_base + bios_offset);
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    if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
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	cpu_register_physical_memory((uint32_t)(0x1fc00000),
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	cpu_register_physical_memory(0x1fc00000,
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				     BIOS_SIZE, bios_offset | IO_MEM_ROM);
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    } else {
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	/* not fatal */
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