tcg-sparc: Clean up cruft stemming from attempts to use global registers.
Don't use -ffixed-gN. Don't link statically. Don't save/restore AREG0 around calls. Don't allocate space on the stack for AREG0 save. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
0c554161b6
commit
4c3204cb12
12
configure
vendored
12
configure
vendored
@ -866,19 +866,11 @@ case "$cpu" in
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sparc)
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LDFLAGS="-m32 $LDFLAGS"
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QEMU_CFLAGS="-m32 -mcpu=ultrasparc $QEMU_CFLAGS"
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QEMU_CFLAGS="-ffixed-g2 -ffixed-g3 $QEMU_CFLAGS"
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if test "$solaris" = "no" ; then
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QEMU_CFLAGS="-ffixed-g1 -ffixed-g6 $QEMU_CFLAGS"
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fi
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host_guest_base="yes"
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;;
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sparc64)
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LDFLAGS="-m64 $LDFLAGS"
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QEMU_CFLAGS="-m64 -mcpu=ultrasparc $QEMU_CFLAGS"
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QEMU_CFLAGS="-ffixed-g5 -ffixed-g6 -ffixed-g7 $QEMU_CFLAGS"
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if test "$solaris" != "no" ; then
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QEMU_CFLAGS="-ffixed-g1 $QEMU_CFLAGS"
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fi
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host_guest_base="yes"
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;;
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s390)
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@ -4101,10 +4093,6 @@ fi
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if test "$target_linux_user" = "yes" -o "$target_bsd_user" = "yes" ; then
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case "$ARCH" in
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sparc)
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# -static is used to avoid g1/g3 usage by the dynamic linker
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ldflags="$linker_script -static $ldflags"
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;;
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alpha | s390x)
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# The default placement of the application is fine.
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;;
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@ -161,7 +161,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O3);
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break;
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case 'I':
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ct->ct |= TCG_CT_CONST_S11;
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@ -681,11 +680,22 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret,
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/* Generate global QEMU prologue and epilogue code */
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static void tcg_target_qemu_prologue(TCGContext *s)
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{
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tcg_set_frame(s, TCG_REG_I6, TCG_TARGET_CALL_STACK_OFFSET,
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CPU_TEMP_BUF_NLONGS * (int)sizeof(long));
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int tmp_buf_size, frame_size;
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/* The TCG temp buffer is at the top of the frame, immediately
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below the frame pointer. */
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tmp_buf_size = CPU_TEMP_BUF_NLONGS * (int)sizeof(long);
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tcg_set_frame(s, TCG_REG_I6, TCG_TARGET_STACK_BIAS - tmp_buf_size,
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tmp_buf_size);
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/* TCG_TARGET_CALL_STACK_OFFSET includes the stack bias, but is
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otherwise the minimal frame usable by callees. */
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frame_size = TCG_TARGET_CALL_STACK_OFFSET - TCG_TARGET_STACK_BIAS;
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frame_size += TCG_STATIC_CALL_ARGS_SIZE + tmp_buf_size;
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frame_size += TCG_TARGET_STACK_ALIGN - 1;
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frame_size &= -TCG_TARGET_STACK_ALIGN;
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tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
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INSN_IMM13(-(TCG_TARGET_STACK_MINFRAME +
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CPU_TEMP_BUF_NLONGS * (int)sizeof(long))));
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INSN_IMM13(-frame_size));
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#ifdef CONFIG_USE_GUEST_BASE
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if (GUEST_BASE != 0) {
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@ -698,6 +708,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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INSN_RS2(TCG_REG_G0));
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/* delay slot */
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tcg_out_nop(s);
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/* No epilogue required. We issue ret + restore directly in the TB. */
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}
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#if defined(CONFIG_SOFTMMU)
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@ -880,12 +892,6 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int sizeop)
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tcg_out_mov(s, TCG_TYPE_REG, tcg_target_call_iarg_regs[n++],
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args[addrlo_idx]);
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/* Store AREG0 in stack to avoid ugly glibc bugs that mangle
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global registers */
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tcg_out_st(s, TCG_TYPE_REG, TCG_AREG0, TCG_REG_CALL_STACK,
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TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
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sizeof(long));
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/* qemu_ld_helper[s_bits](arg0, arg1) */
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tcg_out32(s, CALL | ((((tcg_target_ulong)qemu_ld_helpers[s_bits]
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- (tcg_target_ulong)s->code_ptr) >> 2)
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@ -893,11 +899,6 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int sizeop)
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/* delay slot */
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tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[n], memi);
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/* Reload AREG0. */
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tcg_out_ld(s, TCG_TYPE_REG, TCG_AREG0, TCG_REG_CALL_STACK,
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TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
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sizeof(long));
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n = tcg_target_call_oarg_regs[0];
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/* datalo = sign_extend(arg0) */
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switch (sizeop) {
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@ -1011,12 +1012,6 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int sizeop)
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}
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tcg_out_mov(s, TCG_TYPE_REG, tcg_target_call_iarg_regs[n++], datalo);
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/* Store AREG0 in stack to avoid ugly glibc bugs that mangle
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global registers */
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tcg_out_st(s, TCG_TYPE_REG, TCG_AREG0, TCG_REG_CALL_STACK,
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TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
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sizeof(long));
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/* qemu_st_helper[s_bits](arg0, arg1, arg2) */
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tcg_out32(s, CALL | ((((tcg_target_ulong)qemu_st_helpers[sizeop]
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- (tcg_target_ulong)s->code_ptr) >> 2)
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@ -1024,11 +1019,6 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int sizeop)
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/* delay slot */
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tcg_out_movi(s, TCG_TYPE_REG, tcg_target_call_iarg_regs[n], memi);
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/* Reload AREG0. */
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tcg_out_ld(s, TCG_TYPE_REG, TCG_AREG0, TCG_REG_CALL_STACK,
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TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
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sizeof(long));
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*label_ptr |= INSN_OFF19((unsigned long)s->code_ptr -
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(unsigned long)label_ptr);
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#else
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@ -1091,15 +1081,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
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tcg_out32(s, JMPL | INSN_RD(TCG_REG_O7) | INSN_RS1(TCG_REG_I5) |
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INSN_RS2(TCG_REG_G0));
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}
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/* Store AREG0 in stack to avoid ugly glibc bugs that mangle
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global registers */
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// delay slot
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tcg_out_st(s, TCG_TYPE_REG, TCG_AREG0, TCG_REG_CALL_STACK,
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TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
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sizeof(long));
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tcg_out_ld(s, TCG_TYPE_REG, TCG_AREG0, TCG_REG_CALL_STACK,
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TCG_TARGET_CALL_STACK_OFFSET - TCG_STATIC_CALL_ARGS_SIZE -
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sizeof(long));
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/* delay slot */
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tcg_out_nop(s);
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break;
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case INDEX_op_jmp:
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case INDEX_op_br:
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@ -66,20 +66,16 @@ typedef enum {
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#define TCG_CT_CONST_S13 0x200
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/* used for function call generation */
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#define TCG_REG_CALL_STACK TCG_REG_I6
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#define TCG_REG_CALL_STACK TCG_REG_O6
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#if TCG_TARGET_REG_BITS == 64
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// Reserve space for AREG0
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#define TCG_TARGET_STACK_MINFRAME (176 + 4 * (int)sizeof(long) + \
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TCG_STATIC_CALL_ARGS_SIZE)
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#define TCG_TARGET_CALL_STACK_OFFSET (2047 - 16)
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#define TCG_TARGET_STACK_ALIGN 16
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#define TCG_TARGET_STACK_BIAS 2047
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#define TCG_TARGET_STACK_ALIGN 16
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#define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS)
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#else
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// AREG0 + one word for alignment
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#define TCG_TARGET_STACK_MINFRAME (92 + (2 + 1) * (int)sizeof(long) + \
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TCG_STATIC_CALL_ARGS_SIZE)
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#define TCG_TARGET_CALL_STACK_OFFSET TCG_TARGET_STACK_MINFRAME
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#define TCG_TARGET_STACK_ALIGN 8
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#define TCG_TARGET_STACK_BIAS 0
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#define TCG_TARGET_STACK_ALIGN 8
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#define TCG_TARGET_CALL_STACK_OFFSET (64 + 4 + 6*4)
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#endif
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#if TCG_TARGET_REG_BITS == 64
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