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VFIO updates 2016-02-19

Browse Source 
- AER pre-enable and misc fixes (Cao jin and Chen Fan)
  - PCI_CAP_LIST_NEXT & PCI_MSIX_FLAGS cleanup (Wei Yang)
  - AMD XGBE KVM platform passthrough (Eric Auger)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWx1DEAAoJECObm247sIsiefwQAIxC+/YW99fvUmNShOChUiVV
 ql+PJKgyHzn5lxPxHdWF9Vnv8fi3fBUFNj4v1aaagrKqGfpfUeC5IYYtgWmOes9+
 dKZGLzoG8II7EpAZmi0uSqxaIXaJBBZWlfoD26jHMT+LcDiEPj+yRoWoftoWE/8s
 8rR5qxFKnJ5E5C7v2qe+RwtRHzK2S0B2jesRpU29nYKIWu7qafwxGbDqALk9YSyI
 rt0VwVG54bjIXZAwamFUTbaUQrb/Eg42Wx4vwNXW3WqM9GvkJOuiwQko2CKPIaEj
 RXolXW1nblOnTRsB+F/uRqGrdwbG3bi1GMfibtifC7DPpC6+XhWPSIrIC7dWQ9a3
 pu88+7T3VT9vgEvq8ABeiE41wZKKftcxyd67rlVGhOsyK3mMSfn+PRIZ7PdnO7ih
 e5ISLRO7KMAaIp7/RbcgDbEM5EyVvVt0tJqs/4tS3TdvDLPyOkUFw0d6Tb5kpJTG
 NfOJk3e8Qv3iXHeBg0O3GHocO4KO8fieloKR2rMVKq13GDkbiwHun5H6hKGRkWS0
 ZleweLgKbVWmROJdEqcKp97eBhjoEUlJLRvAlcKJCtIIctMm2Bf2MeasqoFbRlEU
 Nt1rPz/Q0E7YLihQLn6a9F3yZVS0CWqimk6X7B3/PG4bzCq2MUeiL+WIla4gboQG
 6pGu+GzU0g4IXiIgJeOU
 =HiHL
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20160219.1' into staging

VFIO updates 2016-02-19

 - AER pre-enable and misc fixes (Cao jin and Chen Fan)
 - PCI_CAP_LIST_NEXT & PCI_MSIX_FLAGS cleanup (Wei Yang)
 - AMD XGBE KVM platform passthrough (Eric Auger)

# gpg: Signature made Fri 19 Feb 2016 17:28:36 GMT using RSA key ID 3BB08B22
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>"
# gpg:                 aka "Alex Williamson <alex@shazbot.org>"
# gpg:                 aka "Alex Williamson <alwillia@redhat.com>"
# gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>"

* remotes/awilliam/tags/vfio-update-20160219.1:
  vfio/pci: use PCI_MSIX_FLAGS on retrieving the MSIX entries
  hw/arm/sysbus-fdt: remove qemu_fdt_setprop returned value check
  hw/arm/sysbus-fdt: enable amd-xgbe dynamic instantiation
  hw/arm/sysbus-fdt: helpers for clock node generation
  device_tree: qemu_fdt_getprop_cell converted to use the error API
  device_tree: qemu_fdt_getprop converted to use the error API
  device_tree: introduce qemu_fdt_node_path
  device_tree: introduce load_device_tree_from_sysfs
  hw/vfio/platform: amd-xgbe device
  vfio/pci: replace 1 with PCI_CAP_LIST_NEXT to make code self-explain
  pcie_aer: expose pcie_aer_msg() interface
  aer: impove pcie_aer_init to support vfio device
  vfio: make the 4 bytes aligned for capability size
  pcie: modify the capability size assert

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2016-02-19 17:44:24 +00:00
commit 586d1a99ff
15 changed files with 661 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

182
device_tree.c
View File

@ -13,6 +13,10 @@
#include "qemu/osdep.h"
#ifdef CONFIG_LINUX
#include <dirent.h>
#endif
#include "qemu-common.h"
#include "qemu/error-report.h"
#include "sysemu/device_tree.h"
@ -112,6 +116,102 @@ fail:
return NULL;
}
#ifdef CONFIG_LINUX
#define SYSFS_DT_BASEDIR "/proc/device-tree"
/**
* read_fstree: this function is inspired from dtc read_fstree
* @fdt: preallocated fdt blob buffer, to be populated
* @dirname: directory to scan under SYSFS_DT_BASEDIR
* the search is recursive and the tree is searched down to the
* leaves (property files).
*
* the function asserts in case of error
*/
static void read_fstree(void *fdt, const char *dirname)
{
DIR *d;
struct dirent *de;
struct stat st;
const char *root_dir = SYSFS_DT_BASEDIR;
const char *parent_node;
if (strstr(dirname, root_dir) != dirname) {
error_setg(&error_fatal, "%s: %s must be searched within %s",
__func__, dirname, root_dir);
}
parent_node = &dirname[strlen(SYSFS_DT_BASEDIR)];
d = opendir(dirname);
if (!d) {
error_setg(&error_fatal, "%s cannot open %s", __func__, dirname);
}
while ((de = readdir(d)) != NULL) {
char *tmpnam;
if (!g_strcmp0(de->d_name, ".")
|| !g_strcmp0(de->d_name, "..")) {
continue;
}
tmpnam = g_strdup_printf("%s/%s", dirname, de->d_name);
if (lstat(tmpnam, &st) < 0) {
error_setg(&error_fatal, "%s cannot lstat %s", __func__, tmpnam);
}
if (S_ISREG(st.st_mode)) {
gchar *val;
gsize len;
if (!g_file_get_contents(tmpnam, &val, &len, NULL)) {
error_setg(&error_fatal, "%s not able to extract info from %s",
__func__, tmpnam);
}
if (strlen(parent_node) > 0) {
qemu_fdt_setprop(fdt, parent_node,
de->d_name, val, len);
} else {
qemu_fdt_setprop(fdt, "/", de->d_name, val, len);
}
g_free(val);
} else if (S_ISDIR(st.st_mode)) {
char *node_name;
node_name = g_strdup_printf("%s/%s",
parent_node, de->d_name);
qemu_fdt_add_subnode(fdt, node_name);
g_free(node_name);
read_fstree(fdt, tmpnam);
}
g_free(tmpnam);
}
closedir(d);
}
/* load_device_tree_from_sysfs: extract the dt blob from host sysfs */
void *load_device_tree_from_sysfs(void)
{
void *host_fdt;
int host_fdt_size;
host_fdt = create_device_tree(&host_fdt_size);
read_fstree(host_fdt, SYSFS_DT_BASEDIR);
if (fdt_check_header(host_fdt)) {
error_setg(&error_fatal,
"%s host device tree extracted into memory is invalid",
__func__);
}
return host_fdt;
}
#endif /* CONFIG_LINUX */
static int findnode_nofail(void *fdt, const char *node_path)
{
int offset;
@ -126,6 +226,60 @@ static int findnode_nofail(void *fdt, const char *node_path)
return offset;
}
char **qemu_fdt_node_path(void *fdt, const char *name, char *compat,
Error **errp)
{
int offset, len, ret;
const char *iter_name;
unsigned int path_len = 16, n = 0;
GSList *path_list = NULL, *iter;
char **path_array;
offset = fdt_node_offset_by_compatible(fdt, -1, compat);
while (offset >= 0) {
iter_name = fdt_get_name(fdt, offset, &len);
if (!iter_name) {
offset = len;
break;
}
if (!strcmp(iter_name, name)) {
char *path;
path = g_malloc(path_len);
while ((ret = fdt_get_path(fdt, offset, path, path_len))
== -FDT_ERR_NOSPACE) {
path_len += 16;
path = g_realloc(path, path_len);
}
path_list = g_slist_prepend(path_list, path);
n++;
}
offset = fdt_node_offset_by_compatible(fdt, offset, compat);
}
if (offset < 0 && offset != -FDT_ERR_NOTFOUND) {
error_setg(errp, "%s: abort parsing dt for %s/%s: %s",
__func__, name, compat, fdt_strerror(offset));
for (iter = path_list; iter; iter = iter->next) {
g_free(iter->data);
}
g_slist_free(path_list);
return NULL;
}
path_array = g_new(char *, n + 1);
path_array[n--] = NULL;
for (iter = path_list; iter; iter = iter->next) {
path_array[n--] = iter->data;
}
g_slist_free(path_list);
return path_array;
}
int qemu_fdt_setprop(void *fdt, const char *node_path,
const char *property, const void *val, int size)
{
@ -179,31 +333,39 @@ int qemu_fdt_setprop_string(void *fdt, const char *node_path,
}
const void *qemu_fdt_getprop(void *fdt, const char *node_path,
const char *property, int *lenp)
const char *property, int *lenp, Error **errp)
{
int len;
const void *r;
if (!lenp) {
lenp = &len;
}
r = fdt_getprop(fdt, findnode_nofail(fdt, node_path), property, lenp);
if (!r) {
error_report("%s: Couldn't get %s/%s: %s", __func__,
node_path, property, fdt_strerror(*lenp));
exit(1);
error_setg(errp, "%s: Couldn't get %s/%s: %s", __func__,
node_path, property, fdt_strerror(*lenp));
}
return r;
}
uint32_t qemu_fdt_getprop_cell(void *fdt, const char *node_path,
const char *property)
const char *property, int *lenp, Error **errp)
{
int len;
const uint32_t *p = qemu_fdt_getprop(fdt, node_path, property, &len);
if (len != 4) {
error_report("%s: %s/%s not 4 bytes long (not a cell?)",
__func__, node_path, property);
exit(1);
const uint32_t *p;
if (!lenp) {
lenp = &len;
}
p = qemu_fdt_getprop(fdt, node_path, property, lenp, errp);
if (!p) {
return 0;
} else if (*lenp != 4) {
error_setg(errp, "%s: %s/%s not 4 bytes long (not a cell?)",
__func__, node_path, property);
*lenp = -EINVAL;
return 0;
}
return be32_to_cpu(*p);
}

6
hw/arm/boot.c
View File

@ -437,8 +437,10 @@ static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
return 0;
}
acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells");
scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells");
acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells",
NULL, &error_fatal);
scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells",
NULL, &error_fatal);
if (acells == 0 || scells == 0) {
fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
goto fail;

321
hw/arm/sysbus-fdt.c
View File

@ -22,6 +22,11 @@
*/
#include "qemu/osdep.h"
#include <libfdt.h>
#include "qemu-common.h"
#ifdef CONFIG_LINUX
#include <linux/vfio.h>
#endif
#include "hw/arm/sysbus-fdt.h"
#include "qemu/error-report.h"
#include "sysemu/device_tree.h"
@ -29,6 +34,7 @@
#include "sysemu/sysemu.h"
#include "hw/vfio/vfio-platform.h"
#include "hw/vfio/vfio-calxeda-xgmac.h"
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/arm/fdt.h"
/*
@ -57,6 +63,146 @@ typedef struct NodeCreationPair {
int (*add_fdt_node_fn)(SysBusDevice *sbdev, void *opaque);
} NodeCreationPair;
/* helpers */
typedef struct HostProperty {
const char *name;
bool optional;
} HostProperty;
#ifdef CONFIG_LINUX
/**
* copy_properties_from_host
*
* copies properties listed in an array from host device tree to
* guest device tree. If a non optional property is not found, the
* function asserts. An optional property is ignored if not found
* in the host device tree.
* @props: array of HostProperty to copy
* @nb_props: number of properties in the array
* @host_dt: host device tree blob
* @guest_dt: guest device tree blob
* @node_path: host dt node path where the property is supposed to be
found
* @nodename: guest node name the properties should be added to
*/
static void copy_properties_from_host(HostProperty *props, int nb_props,
void *host_fdt, void *guest_fdt,
char *node_path, char *nodename)
{
int i, prop_len;
const void *r;
Error *err = NULL;
for (i = 0; i < nb_props; i++) {
r = qemu_fdt_getprop(host_fdt, node_path,
props[i].name,
&prop_len,
props[i].optional ? &err : &error_fatal);
if (r) {
qemu_fdt_setprop(guest_fdt, nodename,
props[i].name, r, prop_len);
} else {
if (prop_len != -FDT_ERR_NOTFOUND) {
/* optional property not returned although property exists */
error_report_err(err);
} else {
error_free(err);
}
}
}
}
/* clock properties whose values are copied/pasted from host */
static HostProperty clock_copied_properties[] = {
{"compatible", false},
{"#clock-cells", false},
{"clock-frequency", true},
{"clock-output-names", true},
};
/**
* fdt_build_clock_node
*
* Build a guest clock node, used as a dependency from a passthrough'ed
* device. Most information are retrieved from the host clock node.
* Also check the host clock is a fixed one.
*
* @host_fdt: host device tree blob from which info are retrieved
* @guest_fdt: guest device tree blob where the clock node is added
* @host_phandle: phandle of the clock in host device tree
* @guest_phandle: phandle to assign to the guest node
*/
static void fdt_build_clock_node(void *host_fdt, void *guest_fdt,
uint32_t host_phandle,
uint32_t guest_phandle)
{
char *node_path = NULL;
char *nodename;
const void *r;
int ret, node_offset, prop_len, path_len = 16;
node_offset = fdt_node_offset_by_phandle(host_fdt, host_phandle);
if (node_offset <= 0) {
error_setg(&error_fatal,
"not able to locate clock handle %d in host device tree",
host_phandle);
}
node_path = g_malloc(path_len);
while ((ret = fdt_get_path(host_fdt, node_offset, node_path, path_len))
== -FDT_ERR_NOSPACE) {
path_len += 16;
node_path = g_realloc(node_path, path_len);
}
if (ret < 0) {
error_setg(&error_fatal,
"not able to retrieve node path for clock handle %d",
host_phandle);
}
r = qemu_fdt_getprop(host_fdt, node_path, "compatible", &prop_len,
&error_fatal);
if (strcmp(r, "fixed-clock")) {
error_setg(&error_fatal,
"clock handle %d is not a fixed clock", host_phandle);
}
nodename = strrchr(node_path, '/');
qemu_fdt_add_subnode(guest_fdt, nodename);
copy_properties_from_host(clock_copied_properties,
ARRAY_SIZE(clock_copied_properties),
host_fdt, guest_fdt,
node_path, nodename);
qemu_fdt_setprop_cell(guest_fdt, nodename, "phandle", guest_phandle);
g_free(node_path);
}
/**
* sysfs_to_dt_name: convert the name found in sysfs into the node name
* for instance e0900000.xgmac is converted into xgmac@e0900000
* @sysfs_name: directory name in sysfs
*
* returns the device tree name upon success or NULL in case the sysfs name
* does not match the expected format
*/
static char *sysfs_to_dt_name(const char *sysfs_name)
{
gchar **substrings = g_strsplit(sysfs_name, ".", 2);
char *dt_name = NULL;
if (!substrings || !substrings[0] || !substrings[1]) {
goto out;
}
dt_name = g_strdup_printf("%s@%s", substrings[1], substrings[0]);
out:
g_strfreev(substrings);
return dt_name;
}
/* Device Specific Code */
/**
@ -71,7 +217,7 @@ static int add_calxeda_midway_xgmac_fdt_node(SysBusDevice *sbdev, void *opaque)
PlatformBusDevice *pbus = data->pbus;
void *fdt = data->fdt;
const char *parent_node = data->pbus_node_name;
int compat_str_len, i, ret = -1;
int compat_str_len, i;
char *nodename;
uint32_t *irq_attr, *reg_attr;
uint64_t mmio_base, irq_number;
@ -96,12 +242,8 @@ static int add_calxeda_midway_xgmac_fdt_node(SysBusDevice *sbdev, void *opaque)
reg_attr[2 * i + 1] = cpu_to_be32(
memory_region_size(&vdev->regions[i]->mem));
}
ret = qemu_fdt_setprop(fdt, nodename, "reg", reg_attr,
vbasedev->num_regions * 2 * sizeof(uint32_t));
if (ret) {
error_report("could not set reg property of node %s", nodename);
goto fail_reg;
}
qemu_fdt_setprop(fdt, nodename, "reg", reg_attr,
vbasedev->num_regions * 2 * sizeof(uint32_t));
irq_attr = g_new(uint32_t, vbasedev->num_irqs * 3);
for (i = 0; i < vbasedev->num_irqs; i++) {
@ -111,22 +253,173 @@ static int add_calxeda_midway_xgmac_fdt_node(SysBusDevice *sbdev, void *opaque)
irq_attr[3 * i + 1] = cpu_to_be32(irq_number);
irq_attr[3 * i + 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_LEVEL_HI);
}
ret = qemu_fdt_setprop(fdt, nodename, "interrupts",
qemu_fdt_setprop(fdt, nodename, "interrupts",
irq_attr, vbasedev->num_irqs * 3 * sizeof(uint32_t));
if (ret) {
error_report("could not set interrupts property of node %s",
nodename);
}
g_free(irq_attr);
fail_reg:
g_free(reg_attr);
g_free(nodename);
return ret;
return 0;
}
/* AMD xgbe properties whose values are copied/pasted from host */
static HostProperty amd_xgbe_copied_properties[] = {
{"compatible", false},
{"dma-coherent", true},
{"amd,per-channel-interrupt", true},
{"phy-mode", false},
{"mac-address", true},
{"amd,speed-set", false},
{"amd,serdes-blwc", true},
{"amd,serdes-cdr-rate", true},
{"amd,serdes-pq-skew", true},
{"amd,serdes-tx-amp", true},
{"amd,serdes-dfe-tap-config", true},
{"amd,serdes-dfe-tap-enable", true},
{"clock-names", false},
};
/**
* add_amd_xgbe_fdt_node
*
* Generates the combined xgbe/phy node following kernel >=4.2
* binding documentation:
* Documentation/devicetree/bindings/net/amd-xgbe.txt:
* Also 2 clock nodes are created (dma and ptp)
*
* Asserts in case of error
*/
static int add_amd_xgbe_fdt_node(SysBusDevice *sbdev, void *opaque)
{
PlatformBusFDTData *data = opaque;
PlatformBusDevice *pbus = data->pbus;
VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev);
VFIODevice *vbasedev = &vdev->vbasedev;
VFIOINTp *intp;
const char *parent_node = data->pbus_node_name;
char **node_path, *nodename, *dt_name;
void *guest_fdt = data->fdt, *host_fdt;
const void *r;
int i, prop_len;
uint32_t *irq_attr, *reg_attr, *host_clock_phandles;
uint64_t mmio_base, irq_number;
uint32_t guest_clock_phandles[2];
host_fdt = load_device_tree_from_sysfs();
dt_name = sysfs_to_dt_name(vbasedev->name);
if (!dt_name) {
error_setg(&error_fatal, "%s incorrect sysfs device name %s",
__func__, vbasedev->name);
}
node_path = qemu_fdt_node_path(host_fdt, dt_name, vdev->compat,
&error_fatal);
if (!node_path || !node_path[0]) {
error_setg(&error_fatal, "%s unable to retrieve node path for %s/%s",
__func__, dt_name, vdev->compat);
}
if (node_path[1]) {
error_setg(&error_fatal, "%s more than one node matching %s/%s!",
__func__, dt_name, vdev->compat);
}
g_free(dt_name);
if (vbasedev->num_regions != 5) {
error_setg(&error_fatal, "%s Does the host dt node combine XGBE/PHY?",
__func__);
}
/* generate nodes for DMA_CLK and PTP_CLK */
r = qemu_fdt_getprop(host_fdt, node_path[0], "clocks",
&prop_len, &error_fatal);
if (prop_len != 8) {
error_setg(&error_fatal, "%s clocks property should contain 2 handles",
__func__);
}
host_clock_phandles = (uint32_t *)r;
guest_clock_phandles[0] = qemu_fdt_alloc_phandle(guest_fdt);
guest_clock_phandles[1] = qemu_fdt_alloc_phandle(guest_fdt);
/**
* clock handles fetched from host dt are in be32 layout whereas
* rest of the code uses cpu layout. Also guest clock handles are
* in cpu layout.
*/
fdt_build_clock_node(host_fdt, guest_fdt,
be32_to_cpu(host_clock_phandles[0]),
guest_clock_phandles[0]);
fdt_build_clock_node(host_fdt, guest_fdt,
be32_to_cpu(host_clock_phandles[1]),
guest_clock_phandles[1]);
/* combined XGBE/PHY node */
mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, 0);
nodename = g_strdup_printf("%s/%s@%" PRIx64, parent_node,
vbasedev->name, mmio_base);
qemu_fdt_add_subnode(guest_fdt, nodename);
copy_properties_from_host(amd_xgbe_copied_properties,
ARRAY_SIZE(amd_xgbe_copied_properties),
host_fdt, guest_fdt,
node_path[0], nodename);
qemu_fdt_setprop_cells(guest_fdt, nodename, "clocks",
guest_clock_phandles[0],
guest_clock_phandles[1]);
reg_attr = g_new(uint32_t, vbasedev->num_regions * 2);
for (i = 0; i < vbasedev->num_regions; i++) {
mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, i);
reg_attr[2 * i] = cpu_to_be32(mmio_base);
reg_attr[2 * i + 1] = cpu_to_be32(
memory_region_size(&vdev->regions[i]->mem));
}
qemu_fdt_setprop(guest_fdt, nodename, "reg", reg_attr,
vbasedev->num_regions * 2 * sizeof(uint32_t));
irq_attr = g_new(uint32_t, vbasedev->num_irqs * 3);
for (i = 0; i < vbasedev->num_irqs; i++) {
irq_number = platform_bus_get_irqn(pbus, sbdev , i)
+ data->irq_start;
irq_attr[3 * i] = cpu_to_be32(GIC_FDT_IRQ_TYPE_SPI);
irq_attr[3 * i + 1] = cpu_to_be32(irq_number);
/*
* General device interrupt and PCS auto-negotiation interrupts are
* level-sensitive while the 4 per-channel interrupts are edge
* sensitive
*/
QLIST_FOREACH(intp, &vdev->intp_list, next) {
if (intp->pin == i) {
break;
}
}
if (intp->flags & VFIO_IRQ_INFO_AUTOMASKED) {
irq_attr[3 * i + 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_LEVEL_HI);
} else {
irq_attr[3 * i + 2] = cpu_to_be32(GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);
}
}
qemu_fdt_setprop(guest_fdt, nodename, "interrupts",
irq_attr, vbasedev->num_irqs * 3 * sizeof(uint32_t));
g_free(host_fdt);
g_strfreev(node_path);
g_free(irq_attr);
g_free(reg_attr);
g_free(nodename);
return 0;
}
#endif /* CONFIG_LINUX */
/* list of supported dynamic sysbus devices */
static const NodeCreationPair add_fdt_node_functions[] = {
#ifdef CONFIG_LINUX
{TYPE_VFIO_CALXEDA_XGMAC, add_calxeda_midway_xgmac_fdt_node},
{TYPE_VFIO_AMD_XGBE, add_amd_xgbe_fdt_node},
#endif
{"", NULL}, /* last element */
};

6
hw/arm/vexpress.c
View File

@ -478,8 +478,10 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt)
uint32_t acells, scells, intc;
const VEDBoardInfo *daughterboard = (const VEDBoardInfo *)info;
acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells");
scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells");
acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells",
NULL, &error_fatal);
scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells",
NULL, &error_fatal);
intc = find_int_controller(fdt);
if (!intc) {
/* Not fatal, we just won't provide virtio. This will

2
hw/pci-bridge/ioh3420.c
View File

@ -126,7 +126,7 @@ static int ioh3420_initfn(PCIDevice *d)
goto err_pcie_cap;
}
pcie_cap_root_init(d);
rc = pcie_aer_init(d, IOH_EP_AER_OFFSET);
rc = pcie_aer_init(d, IOH_EP_AER_OFFSET, PCI_ERR_SIZEOF);
if (rc < 0) {
goto err;
}

2
hw/pci-bridge/xio3130_downstream.c
View File

@ -89,7 +89,7 @@ static int xio3130_downstream_initfn(PCIDevice *d)
goto err_pcie_cap;
}
pcie_cap_arifwd_init(d);
rc = pcie_aer_init(d, XIO3130_AER_OFFSET);
rc = pcie_aer_init(d, XIO3130_AER_OFFSET, PCI_ERR_SIZEOF);
if (rc < 0) {
goto err;
}

2
hw/pci-bridge/xio3130_upstream.c
View File

@ -78,7 +78,7 @@ static int xio3130_upstream_initfn(PCIDevice *d)
}
pcie_cap_flr_init(d);
pcie_cap_deverr_init(d);
rc = pcie_aer_init(d, XIO3130_AER_OFFSET);
rc = pcie_aer_init(d, XIO3130_AER_OFFSET, PCI_ERR_SIZEOF);
if (rc < 0) {
goto err;
}

2
hw/pci/pcie.c
View File

@ -608,7 +608,7 @@ void pcie_add_capability(PCIDevice *dev,
assert(offset >= PCI_CONFIG_SPACE_SIZE);
assert(offset < offset + size);
assert(offset + size < PCIE_CONFIG_SPACE_SIZE);
assert(offset + size <= PCIE_CONFIG_SPACE_SIZE);
assert(size >= 8);
assert(pci_is_express(dev));

6
hw/pci/pcie_aer.c
View File

@ -95,12 +95,12 @@ static void aer_log_clear_all_err(PCIEAERLog *aer_log)
aer_log->log_num = 0;
}
int pcie_aer_init(PCIDevice *dev, uint16_t offset)
int pcie_aer_init(PCIDevice *dev, uint16_t offset, uint16_t size)
{
PCIExpressDevice *exp;
pcie_add_capability(dev, PCI_EXT_CAP_ID_ERR, PCI_ERR_VER,
offset, PCI_ERR_SIZEOF);
offset, size);
exp = &dev->exp;
exp->aer_cap = offset;
@ -371,7 +371,7 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg)
*
* Walk up the bus tree from the device, propagate the error message.
*/
static void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg)
void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg)
{
uint8_t type;

1
hw/vfio/Makefile.objs
View File

@ -3,4 +3,5 @@ obj-$(CONFIG_SOFTMMU) += common.o
obj-$(CONFIG_PCI) += pci.o pci-quirks.o
obj-$(CONFIG_SOFTMMU) += platform.o
obj-$(CONFIG_SOFTMMU) += calxeda-xgmac.o
obj-$(CONFIG_SOFTMMU) += amd-xgbe.o
endif

55
hw/vfio/amd-xgbe.c Normal file
View File

@ -0,0 +1,55 @@
/*
* AMD XGBE VFIO device
*
* Copyright Linaro Limited, 2015
*
* Authors:
* Eric Auger <eric.auger@linaro.org>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
*/
#include "hw/vfio/vfio-amd-xgbe.h"
static void amd_xgbe_realize(DeviceState *dev, Error **errp)
{
VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(dev);
VFIOAmdXgbeDeviceClass *k = VFIO_AMD_XGBE_DEVICE_GET_CLASS(dev);
vdev->compat = g_strdup("amd,xgbe-seattle-v1a");
k->parent_realize(dev, errp);
}
static const VMStateDescription vfio_platform_amd_xgbe_vmstate = {
.name = TYPE_VFIO_AMD_XGBE,
.unmigratable = 1,
};
static void vfio_amd_xgbe_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
VFIOAmdXgbeDeviceClass *vcxc =
VFIO_AMD_XGBE_DEVICE_CLASS(klass);
vcxc->parent_realize = dc->realize;
dc->realize = amd_xgbe_realize;
dc->desc = "VFIO AMD XGBE";
dc->vmsd = &vfio_platform_amd_xgbe_vmstate;
}
static const TypeInfo vfio_amd_xgbe_dev_info = {
.name = TYPE_VFIO_AMD_XGBE,
.parent = TYPE_VFIO_PLATFORM,
.instance_size = sizeof(VFIOAmdXgbeDevice),
.class_init = vfio_amd_xgbe_class_init,
.class_size = sizeof(VFIOAmdXgbeDeviceClass),
};
static void register_amd_xgbe_dev_type(void)
{
type_register_static(&vfio_amd_xgbe_dev_info);
}
type_init(register_amd_xgbe_dev_type)

13
hw/vfio/pci.c
View File

@ -1207,7 +1207,7 @@ static int vfio_msix_early_setup(VFIOPCIDevice *vdev)
}
if (pread(fd, &ctrl, sizeof(ctrl),
vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
vdev->config_offset + pos + PCI_MSIX_FLAGS) != sizeof(ctrl)) {
return -errno;
}
@ -1505,10 +1505,11 @@ static void vfio_unmap_bars(VFIOPCIDevice *vdev)
*/
static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
{
uint8_t tmp, next = 0xff;
uint8_t tmp;
uint16_t next = PCI_CONFIG_SPACE_SIZE;
for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
tmp = pdev->config[tmp + 1]) {
tmp = pdev->config[tmp + PCI_CAP_LIST_NEXT]) {
if (tmp > pos && tmp < next) {
next = tmp;
}
@ -1697,7 +1698,7 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos)
int ret;
cap_id = pdev->config[pos];
next = pdev->config[pos + 1];
next = pdev->config[pos + PCI_CAP_LIST_NEXT];
/*
* If it becomes important to configure capabilities to their actual
@ -1711,7 +1712,7 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos)
* pci_add_capability always inserts the new capability at the head
* of the chain. Therefore to end up with a chain that matches the
* physical device, we insert from the end by making this recursive.
* This is also why we pre-caclulate size above as cached config space
* This is also why we pre-calculate size above as cached config space
* will be changed as we unwind the stack.
*/
if (next) {
@ -1727,7 +1728,7 @@ static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos)
}
/* Use emulated next pointer to allow dropping caps */
pci_set_byte(vdev->emulated_config_bits + pos + 1, 0xff);
pci_set_byte(vdev->emulated_config_bits + pos + PCI_CAP_LIST_NEXT, 0xff);
switch (cap_id) {
case PCI_CAP_ID_MSI:

3
include/hw/pci/pcie_aer.h
View File

@ -87,7 +87,7 @@ struct PCIEAERErr {
extern const VMStateDescription vmstate_pcie_aer_log;
int pcie_aer_init(PCIDevice *dev, uint16_t offset);
int pcie_aer_init(PCIDevice *dev, uint16_t offset, uint16_t size);
void pcie_aer_exit(PCIDevice *dev);
void pcie_aer_write_config(PCIDevice *dev,
uint32_t addr, uint32_t val, int len);
@ -102,5 +102,6 @@ void pcie_aer_root_write_config(PCIDevice *dev,
/* error injection */
int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err);
void pcie_aer_msg(PCIDevice *dev, const PCIEAERMsg *msg);
#endif /* QEMU_PCIE_AER_H */

51
include/hw/vfio/vfio-amd-xgbe.h Normal file
View File

@ -0,0 +1,51 @@
/*
* VFIO AMD XGBE device
*
* Copyright Linaro Limited, 2015
*
* Authors:
* Eric Auger <eric.auger@linaro.org>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
*/
#ifndef HW_VFIO_VFIO_AMD_XGBE_H
#define HW_VFIO_VFIO_AMD_XGBE_H
#include "hw/vfio/vfio-platform.h"
#define TYPE_VFIO_AMD_XGBE "vfio-amd-xgbe"
/**
* This device exposes:
* - 5 MMIO regions: MAC, PCS, SerDes Rx/Tx regs,
SerDes Integration Registers 1/2 & 2/2
* - 2 level sensitive IRQs and optional DMA channel IRQs
*/
struct VFIOAmdXgbeDevice {
VFIOPlatformDevice vdev;
};
typedef struct VFIOAmdXgbeDevice VFIOAmdXgbeDevice;
struct VFIOAmdXgbeDeviceClass {
/*< private >*/
VFIOPlatformDeviceClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
};
typedef struct VFIOAmdXgbeDeviceClass VFIOAmdXgbeDeviceClass;
#define VFIO_AMD_XGBE_DEVICE(obj) \
OBJECT_CHECK(VFIOAmdXgbeDevice, (obj), TYPE_VFIO_AMD_XGBE)
#define VFIO_AMD_XGBE_DEVICE_CLASS(klass) \
OBJECT_CLASS_CHECK(VFIOAmdXgbeDeviceClass, (klass), \
TYPE_VFIO_AMD_XGBE)
#define VFIO_AMD_XGBE_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(VFIOAmdXgbeDeviceClass, (obj), \
TYPE_VFIO_AMD_XGBE)
#endif

53
include/sysemu/device_tree.h
View File

@ -16,6 +16,32 @@
void *create_device_tree(int *sizep);
void *load_device_tree(const char *filename_path, int *sizep);
#ifdef CONFIG_LINUX
/**
* load_device_tree_from_sysfs: reads the device tree information in the
* /proc/device-tree directory and return the corresponding binary blob
* buffer pointer. Asserts in case of error.
*/
void *load_device_tree_from_sysfs(void);
#endif
/**
* qemu_fdt_node_path: return the paths of nodes matching a given
* name and compat string
* @fdt: pointer to the dt blob
* @name: node name
* @compat: compatibility string
* @errp: handle to an error object
*
* returns a newly allocated NULL-terminated array of node paths.
* Use g_strfreev() to free it. If one or more nodes were found, the
* array contains the path of each node and the last element equals to
* NULL. If there is no error but no matching node was found, the
* returned array contains a single element equal to NULL. If an error
* was encountered when parsing the blob, the function returns NULL
*/
char **qemu_fdt_node_path(void *fdt, const char *name, char *compat,
Error **errp);
int qemu_fdt_setprop(void *fdt, const char *node_path,
const char *property, const void *val, int size);
@ -28,10 +54,33 @@ int qemu_fdt_setprop_string(void *fdt, const char *node_path,
int qemu_fdt_setprop_phandle(void *fdt, const char *node_path,
const char *property,
const char *target_node_path);
/**
* qemu_fdt_getprop: retrieve the value of a given property
* @fdt: pointer to the device tree blob
* @node_path: node path
* @property: name of the property to find
* @lenp: fdt error if any or length of the property on success
* @errp: handle to an error object
*
* returns a pointer to the property on success and NULL on failure
*/
const void *qemu_fdt_getprop(void *fdt, const char *node_path,
const char *property, int *lenp);
const char *property, int *lenp,
Error **errp);
/**
* qemu_fdt_getprop_cell: retrieve the value of a given 4 byte property
* @fdt: pointer to the device tree blob
* @node_path: node path
* @property: name of the property to find
* @lenp: fdt error if any or -EINVAL if the property size is different from
* 4 bytes, or 4 (expected length of the property) upon success.
* @errp: handle to an error object
*
* returns the property value on success
*/
uint32_t qemu_fdt_getprop_cell(void *fdt, const char *node_path,
const char *property);
const char *property, int *lenp,
Error **errp);
uint32_t qemu_fdt_get_phandle(void *fdt, const char *path);
uint32_t qemu_fdt_alloc_phandle(void *fdt);
int qemu_fdt_nop_node(void *fdt, const char *node_path);