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PCI: Mask writes to RO bits in the status reg of PCI config space

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The Status register in the PCI config space has some read-only bits.
Any writes to those bits should be masked out.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6091 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-12-18 22:43:33 +00:00
parent 2231ef1084
commit 8098ed414a
2 changed files with 26 additions and 0 deletions
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11
hw/pci.c
View File

@ -381,6 +381,7 @@ void pci_default_write_config(PCIDevice *d,
case 0x0b: case 0x0b:
case 0x0e: case 0x0e:
case 0x10 ... 0x27: /* base */ case 0x10 ... 0x27: /* base */
case 0x2c ... 0x2f: /* read-only subsystem ID & vendor ID */
case 0x30 ... 0x33: /* rom */ case 0x30 ... 0x33: /* rom */
case 0x3d: case 0x3d:
can_write = 0; can_write = 0;
@ -402,6 +403,7 @@ void pci_default_write_config(PCIDevice *d,
case 0x0a: case 0x0a:
case 0x0b: case 0x0b:
case 0x0e: case 0x0e:
case 0x2c ... 0x2f: /* read-only subsystem ID & vendor ID */
case 0x38 ... 0x3b: /* rom */ case 0x38 ... 0x3b: /* rom */
case 0x3d: case 0x3d:
can_write = 0; can_write = 0;
@ -413,6 +415,15 @@ void pci_default_write_config(PCIDevice *d,
break; break;
} }
if (can_write) { if (can_write) {
/* Mask out writes to reserved bits in registers */
switch (addr) {
case 0x06:
val &= ~PCI_STATUS_RESERVED_MASK_LO;
break;
case 0x07:
val &= ~PCI_STATUS_RESERVED_MASK_HI;
break;
}
d->config[addr] = val; d->config[addr] = val;
} }
if (++addr > 0xff) if (++addr > 0xff)

15
hw/pci.h
View File

@ -54,6 +54,21 @@ typedef struct PCIIORegion {
#define PCI_MIN_GNT 0x3e /* 8 bits */ #define PCI_MIN_GNT 0x3e /* 8 bits */
#define PCI_MAX_LAT 0x3f /* 8 bits */ #define PCI_MAX_LAT 0x3f /* 8 bits */
/* Bits in the PCI Status Register (PCI 2.3 spec) */
#define PCI_STATUS_RESERVED1 0x007
#define PCI_STATUS_INT_STATUS 0x008
#define PCI_STATUS_CAPABILITIES 0x010
#define PCI_STATUS_66MHZ 0x020
#define PCI_STATUS_RESERVED2 0x040
#define PCI_STATUS_FAST_BACK 0x080
#define PCI_STATUS_DEVSEL 0x600
#define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \
PCI_STATUS_INT_STATUS | PCI_STATUS_CAPABILITIES | \
PCI_STATUS_66MHZ | PCI_STATUS_RESERVED2 | PCI_STATUS_FAST_BACK)
#define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8)
struct PCIDevice { struct PCIDevice {
/* PCI config space */ /* PCI config space */
uint8_t config[256]; uint8_t config[256];