Add dummy THC and TEC registers to TCX
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2775 c046a42c-6fe2-441c-8c8c-71466251a162
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								hw/tcx.c
									
									
									
									
									
								
							
							
						
						
									
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								hw/tcx.c
									
									
									
									
									
								
							@ -26,6 +26,9 @@
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#define MAXX 1024
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					#define MAXX 1024
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#define MAXY 768
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					#define MAXY 768
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#define TCX_DAC_NREGS 16
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					#define TCX_DAC_NREGS 16
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					#define TCX_THC_NREGS_8  0x081c
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					#define TCX_THC_NREGS_24 0x1000
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					#define TCX_TEC_NREGS    0x1000
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typedef struct TCXState {
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					typedef struct TCXState {
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    uint32_t addr;
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					    uint32_t addr;
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@ -467,12 +470,34 @@ static CPUWriteMemoryFunc *tcx_dac_write[3] = {
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    tcx_dac_writel,
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					    tcx_dac_writel,
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};
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					};
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					static uint32_t tcx_dummy_readl(void *opaque, target_phys_addr_t addr)
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					{
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					    return 0;
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					}
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					static void tcx_dummy_writel(void *opaque, target_phys_addr_t addr,
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					                             uint32_t val)
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					{
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					}
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					static CPUReadMemoryFunc *tcx_dummy_read[3] = {
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					    tcx_dummy_readl,
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					    tcx_dummy_readl,
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					    tcx_dummy_readl,
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					};
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					static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
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					    tcx_dummy_writel,
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					    tcx_dummy_writel,
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					    tcx_dummy_writel,
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					};
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void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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					void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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              unsigned long vram_offset, int vram_size, int width, int height,
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					              unsigned long vram_offset, int vram_size, int width, int height,
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              int depth)
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					              int depth)
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{
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					{
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    TCXState *s;
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					    TCXState *s;
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    int io_memory;
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					    int io_memory, dummy_memory;
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    int size;
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					    int size;
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    s = qemu_mallocz(sizeof(TCXState));
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					    s = qemu_mallocz(sizeof(TCXState));
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@ -495,6 +520,10 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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    io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
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					    io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
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    cpu_register_physical_memory(addr + 0x00200000, TCX_DAC_NREGS, io_memory);
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					    cpu_register_physical_memory(addr + 0x00200000, TCX_DAC_NREGS, io_memory);
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					    dummy_memory = cpu_register_io_memory(0, tcx_dummy_read, tcx_dummy_write,
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					                                          s);
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					    cpu_register_physical_memory(addr + 0x00700000, TCX_TEC_NREGS,
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					                                 dummy_memory);
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    if (depth == 24) {
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					    if (depth == 24) {
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        // 24-bit plane
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					        // 24-bit plane
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        size = vram_size * 4;
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					        size = vram_size * 4;
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@ -509,9 +538,13 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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        s->cplane = (uint32_t *)vram_base;
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					        s->cplane = (uint32_t *)vram_base;
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        s->cplane_offset = vram_offset;
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					        s->cplane_offset = vram_offset;
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        cpu_register_physical_memory(addr + 0x0a000000, size, vram_offset);
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					        cpu_register_physical_memory(addr + 0x0a000000, size, vram_offset);
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        graphic_console_init(s->ds, tcx24_update_display, tcx24_invalidate_display,
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					        cpu_register_physical_memory(addr + 0x00301000, TCX_THC_NREGS_24,
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                             tcx24_screen_dump, s);
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					                                     dummy_memory);
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					        graphic_console_init(s->ds, tcx24_update_display,
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					                             tcx24_invalidate_display, tcx24_screen_dump, s);
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    } else {
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					    } else {
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					        cpu_register_physical_memory(addr + 0x00300000, TCX_THC_NREGS_8,
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					                                     dummy_memory);
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        graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
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					        graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
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                             tcx_screen_dump, s);
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					                             tcx_screen_dump, s);
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    }
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					    }
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