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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
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ths 2007-11-18 03:19:58 +00:00
parent 7317b8cad7
commit 8c89395eeb
1 changed files with 1 additions and 1 deletions
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target-mips/translate_init.c
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@ -296,7 +296,7 @@ static mips_def_t mips_defs[] =
/* A generic CPU providing MIPS64 Release 2 features. /* A generic CPU providing MIPS64 Release 2 features.
FIXME: Eventually this should be replaced by a real CPU model. */ FIXME: Eventually this should be replaced by a real CPU model. */
.name = "MIPS64R2-generic", .name = "MIPS64R2-generic",
.CP0_PRid = 0x00000000, .CP0_PRid = 0x00010000,
.CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) | (0x1 << CP0C0_AR), .CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) | (0x1 << CP0C0_AR),
.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) | .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
(2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) | (2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) |