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tcg/mips: fix MIPS32(R2) detection

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Fix the MIPS32(R2) cpu detection so that it also works with
-march=octeon. Thanks to Andrew Pinski for the hint.

Cc: Andrew Pinski <apinski@cavium.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2012-09-22 23:08:38 +02:00
parent d3e8f95753
commit 8f06bf693d
2 changed files with 9 additions and 9 deletions
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10
tcg/mips/tcg-target.c
View File

@ -419,7 +419,7 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,
static inline void tcg_out_bswap16(TCGContext *s, TCGReg ret, TCGReg arg) static inline void tcg_out_bswap16(TCGContext *s, TCGReg ret, TCGReg arg)
{ {
#ifdef _MIPS_ARCH_MIPS32R2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg); tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
#else #else
/* ret and arg can't be register at */ /* ret and arg can't be register at */
@ -436,7 +436,7 @@ static inline void tcg_out_bswap16(TCGContext *s, TCGReg ret, TCGReg arg)
static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg) static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg)
{ {
#ifdef _MIPS_ARCH_MIPS32R2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg); tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
tcg_out_opc_reg(s, OPC_SEH, ret, 0, ret); tcg_out_opc_reg(s, OPC_SEH, ret, 0, ret);
#else #else
@ -454,7 +454,7 @@ static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg)
static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg) static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
{ {
#ifdef _MIPS_ARCH_MIPS32R2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg); tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16); tcg_out_opc_sa(s, OPC_ROTR, ret, ret, 16);
#else #else
@ -480,7 +480,7 @@ static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
static inline void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg) static inline void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg)
{ {
#ifdef _MIPS_ARCH_MIPS32R2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
tcg_out_opc_reg(s, OPC_SEB, ret, 0, arg); tcg_out_opc_reg(s, OPC_SEB, ret, 0, arg);
#else #else
tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24); tcg_out_opc_sa(s, OPC_SLL, ret, arg, 24);
@ -490,7 +490,7 @@ static inline void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg)
static inline void tcg_out_ext16s(TCGContext *s, TCGReg ret, TCGReg arg) static inline void tcg_out_ext16s(TCGContext *s, TCGReg ret, TCGReg arg)
{ {
#ifdef _MIPS_ARCH_MIPS32R2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
tcg_out_opc_reg(s, OPC_SEH, ret, 0, arg); tcg_out_opc_reg(s, OPC_SEH, ret, 0, arg);
#else #else
tcg_out_opc_sa(s, OPC_SLL, ret, arg, 16); tcg_out_opc_sa(s, OPC_SLL, ret, arg, 16);

8
tcg/mips/tcg-target.h
View File

@ -88,16 +88,16 @@ typedef enum {
#define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nand_i32 0
/* optional instructions only implemented on MIPS4, MIPS32 and Loongson 2 */ /* optional instructions only implemented on MIPS4, MIPS32 and Loongson 2 */
#if defined(_MIPS_ARCH_MIPS4) || defined(_MIPS_ARCH_MIPS32) || \ #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_LOONGSON2E) || \ defined(_MIPS_ARCH_LOONGSON2E) || defined(_MIPS_ARCH_LOONGSON2F) || \
defined(_MIPS_ARCH_LOONGSON2F) defined(_MIPS_ARCH_MIPS4)
#define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_movcond_i32 1
#else #else
#define TCG_TARGET_HAS_movcond_i32 0 #define TCG_TARGET_HAS_movcond_i32 0
#endif #endif
/* optional instructions only implemented on MIPS32R2 */ /* optional instructions only implemented on MIPS32R2 */
#ifdef _MIPS_ARCH_MIPS32R2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
#define TCG_TARGET_HAS_bswap16_i32 1 #define TCG_TARGET_HAS_bswap16_i32 1
#define TCG_TARGET_HAS_bswap32_i32 1 #define TCG_TARGET_HAS_bswap32_i32 1
#define TCG_TARGET_HAS_rot_i32 1 #define TCG_TARGET_HAS_rot_i32 1