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Another bunch of mips host support.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2788 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-05-08 21:05:55 +00:00
parent e14a693dda
commit 9617efe8e7
3 changed files with 24 additions and 5 deletions
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4
Makefile.target
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@ -181,7 +181,7 @@ BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
endif endif
ifeq ($(ARCH),mips) ifeq ($(ARCH),mips)
OP_CFLAGS+=-G 0 -fomit-frame-pointer -fno-delayed-branch OP_CFLAGS+=-mabi=32 -G0 -fno-PIC -mno-abicalls -fomit-frame-pointer -fno-delayed-branch -Wa,-O0
ifeq ($(WORDS_BIGENDIAN),yes) ifeq ($(WORDS_BIGENDIAN),yes)
BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
else else
@ -190,7 +190,7 @@ endif
endif endif
ifeq ($(ARCH),mips64) ifeq ($(ARCH),mips64)
OP_CFLAGS+=-G 0 -fomit-frame-pointer -fno-delayed-branch OP_CFLAGS+=-mabi=n32 -G0 -fno-PIC -mno-abicalls -fomit-frame-pointer -fno-delayed-branch -Wa,-O0
ifeq ($(WORDS_BIGENDIAN),yes) ifeq ($(WORDS_BIGENDIAN),yes)
BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
else else

3
cpu-exec.c
View File

@ -1545,9 +1545,10 @@ int cpu_signal_handler(int host_signum, void *pinfo,
#elif defined(__mips__) #elif defined(__mips__)
int cpu_signal_handler(int host_signum, struct siginfo *info, int cpu_signal_handler(int host_signum, void *pinfo,
void *puc) void *puc)
{ {
siginfo_t *info = pinfo;
struct ucontext *uc = puc; struct ucontext *uc = puc;
greg_t pc = uc->uc_mcontext.pc; greg_t pc = uc->uc_mcontext.pc;
int is_write; int is_write;

22
dyngen.c
View File

@ -124,6 +124,14 @@
#define elf_check_arch(x) ((x) == EM_MIPS) #define elf_check_arch(x) ((x) == EM_MIPS)
#define ELF_USES_RELOC #define ELF_USES_RELOC
#elif defined(HOST_MIPS64)
/* Assume n32 ABI here, which is ELF32. */
#define ELF_CLASS ELFCLASS32
#define ELF_ARCH EM_MIPS
#define elf_check_arch(x) ((x) == EM_MIPS)
#define ELF_USES_RELOCA
#else #else
#error unsupported CPU - please update the code #error unsupported CPU - please update the code
#endif #endif
@ -1648,7 +1656,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
error("rts expected at the end of %s", name); error("rts expected at the end of %s", name);
copy_size = p - p_start; copy_size = p - p_start;
} }
#elif defined(HOST_MIPS) #elif defined(HOST_MIPS) || defined(HOST_MIPS64)
{ {
#define INSN_RETURN 0x03e00008 #define INSN_RETURN 0x03e00008
#define INSN_NOP 0x00000000 #define INSN_NOP 0x00000000
@ -2510,7 +2518,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
} }
} }
} }
#elif defined(HOST_MIPS) #elif defined(HOST_MIPS) || defined(HOST_MIPS64)
{ {
for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) { for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) {
if (rel->r_offset >= start_offset && rel->r_offset < start_offset + copy_size) { if (rel->r_offset >= start_offset && rel->r_offset < start_offset + copy_size) {
@ -2528,6 +2536,16 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
addend = get32((uint32_t *)(text + rel->r_offset)); addend = get32((uint32_t *)(text + rel->r_offset));
reloc_offset = rel->r_offset - start_offset; reloc_offset = rel->r_offset - start_offset;
switch (type) { switch (type) {
case R_MIPS_26:
fprintf(outfile, " /* R_MIPS_26 RELOC, offset 0x%x, name %s */\n",
rel->r_offset, sym_name);
fprintf(outfile,
" *(uint32_t *)(gen_code_ptr + 0x%x) = "
"(0x%x & ~0x3fffff) "
"| ((0x%x + ((%s - (*(uint32_t *)(gen_code_ptr + 0x%x))) >> 2)) "
" & 0x3fffff);\n",
reloc_offset, addend, addend, name, reloc_offset);
break;
case R_MIPS_HI16: case R_MIPS_HI16:
fprintf(outfile, " /* R_MIPS_HI16 RELOC, offset 0x%x, name %s */\n", fprintf(outfile, " /* R_MIPS_HI16 RELOC, offset 0x%x, name %s */\n",
rel->r_offset, sym_name); rel->r_offset, sym_name);