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target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup

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The if block detecting OMAP/StrongARM modifies the id_cp_reginfo
.access fields in place. So there is no need to replicate the call
to define_arm_cp_reg(). Dropped, and let the OMAP case fall through
to the normal behaviour after the in-place modification.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 72aae9b8ebbc9a76d2b06faf8666ef8a4b34b92a.1373429432.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Crosthwaite 2013-07-10 14:21:42 +10:00 committed by Peter Maydell
parent 12b1057114
commit a703eda18a
1 changed files with 4 additions and 9 deletions
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13
target-arm/helper.c
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@ -1435,21 +1435,16 @@ void register_cp_regs_for_features(ARMCPU *cpu)
arm_feature(env, ARM_FEATURE_STRONGARM)) { arm_feature(env, ARM_FEATURE_STRONGARM)) {
ARMCPRegInfo *r; ARMCPRegInfo *r;
/* Register the blanket "writes ignored" value first to cover the /* Register the blanket "writes ignored" value first to cover the
* whole space. Then define the specific ID registers, but update * whole space. Then update the specific ID registers to allow write
* their access field to allow write access, so that they ignore * access, so that they ignore writes rather than causing them to
* writes rather than causing them to UNDEF. * UNDEF.
*/ */
define_one_arm_cp_reg(cpu, &crn0_wi_reginfo); define_one_arm_cp_reg(cpu, &crn0_wi_reginfo);
for (r = id_cp_reginfo; r->type != ARM_CP_SENTINEL; r++) { for (r = id_cp_reginfo; r->type != ARM_CP_SENTINEL; r++) {
r->access = PL1_RW; r->access = PL1_RW;
define_one_arm_cp_reg(cpu, r);
} }
} else {
/* Just register the standard ID registers (read-only, meaning
* that writes will UNDEF).
*/
define_arm_cp_regs(cpu, id_cp_reginfo);
} }
define_arm_cp_regs(cpu, id_cp_reginfo);
} }
if (arm_feature(env, ARM_FEATURE_AUXCR)) { if (arm_feature(env, ARM_FEATURE_AUXCR)) {